[PATCH v6 1/5] powerpc/85xx: implement hardware timebase sync
chenhui.zhao at freescale.com
Wed Jun 27 20:21:38 EST 2012
On Wed, Jun 27, 2012 at 08:10:34AM +1000, Benjamin Herrenschmidt wrote:
> On Tue, 2012-06-26 at 18:25 +0800, Zhao Chenhui wrote:
> > Do hardware timebase sync. Firstly, stop all timebases, and transfer
> > the timebase value of the boot core to the other core. Finally,
> > start all timebases.
> > Only apply to dual-core chips, such as MPC8572, P2020, etc.
> > Signed-off-by: Zhao Chenhui <chenhui.zhao at freescale.com>
> > Signed-off-by: Li Yang <leoli at freescale.com>
> > ---
> > Changes for v6:
> > * added 85xx_TB_SYNC
> > * added isync() after set_tb()
> > * removed extra entries from mpc85xx_smp_guts_ids
> What's that CONFIG option for ?
This option is to guard the timebase sync routines. It is selected
when KEXEC or HOTPLUG_CPU is enabled on Freescale Book-E platforms.
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