[Qemu-ppc] [RFC PATCH 07/17] KVM: PPC: e500: Mask ea's high 32-bits in 32/64 instr emulation

Alexander Graf agraf at suse.de
Thu Jul 5 00:05:49 EST 2012


On 04.07.2012, at 16:00, Alexander Graf wrote:

> 
> On 25.06.2012, at 14:26, Mihai Caraman wrote:
> 
>> Mask high 32 bits of effective address in emulation layer, for guests running
>> in 32-bit mode.
>> MAS2's high-order 32 bits represents the upper 32 bits of the effective address
>> of the page. Mask it too for tlbwe instruction emulation.
> 
> Ah, there is the tlbwe masking :). Please split this into 2 patches.
> 
>> 
>> Signed-off-by: Mihai Caraman <mihai.caraman at freescale.com>
>> ---
>> arch/powerpc/kvm/e500_emulate.c |    5 ++++-
>> arch/powerpc/kvm/e500_tlb.c     |    2 ++
>> 2 files changed, 6 insertions(+), 1 deletions(-)
>> 
>> diff --git a/arch/powerpc/kvm/e500_emulate.c b/arch/powerpc/kvm/e500_emulate.c
>> index 81288f7..94305db 100644
>> --- a/arch/powerpc/kvm/e500_emulate.c
>> +++ b/arch/powerpc/kvm/e500_emulate.c
>> @@ -1,5 +1,5 @@
>> /*
>> - * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All rights reserved.
>> + * Copyright (C) 2008-2012 Freescale Semiconductor, Inc. All rights reserved.
>> *
>> * Author: Yu Liu, <yu.liu at freescale.com>
>> *
>> @@ -90,6 +90,9 @@ static inline ulong kvmppc_get_ea_indexed(struct kvm_vcpu *vcpu, int ra, int rb)
>> 	if (ra)
>> 		ea += kvmppc_get_gpr(vcpu, ra);
>> 
>> +	if (!(vcpu->arch.shared->msr & MSR_CM))
>> +		ea &= 0xffffffffUL;
> 
> Since this will be in generic code, please guard it with an #ifdef CONFIG_BOOKE.

Oh and do the same check for MSR_SF on Book3s :). Maybe something like

ulong msr_64bit = 0;

#if defined(CONFIG_PPC_BOOK3E_64)
msr_64bit = MSR_CM;
#elif defined(CONFIG_PPC_BOOK3S_64)
msr_64bit = MSR_SF;
#endif

if (!(vcpu->arch.shared->msr & msr_64bit))
    ea = (uint32_t)ea;


Alex



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