[PATCH] powerpc/dts: update dts for p1020rdb
Zhicheng Fan
B32736 at freescale.com
Thu Jan 12 21:04:25 EST 2012
nand: Sync base address with U-boot
sdhc: Add suppot auto cmd12
Signed-off-by: Zhicheng Fan <B32736 at freescale.com>
---
arch/powerpc/boot/dts/fsl/p1020si-post.dtsi | 3 +++
arch/powerpc/boot/dts/p1020rdb.dts | 2 +-
arch/powerpc/boot/dts/p1020rdb_36b.dts | 2 +-
3 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/boot/dts/fsl/p1020si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1020si-post.dtsi
index fc924c5..8e56ad2 100644
--- a/arch/powerpc/boot/dts/fsl/p1020si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1020si-post.dtsi
@@ -145,6 +145,9 @@
/include/ "pq3-usb2-dr-1.dtsi"
/include/ "pq3-esdhc-0.dtsi"
+ sdhc at 2e000 {
+ sdhci,auto-cmd12;
+ };
/include/ "pq3-sec3.3-0.dtsi"
/include/ "pq3-mpic.dtsi"
diff --git a/arch/powerpc/boot/dts/p1020rdb.dts b/arch/powerpc/boot/dts/p1020rdb.dts
index 518bf99..19b8c77 100644
--- a/arch/powerpc/boot/dts/p1020rdb.dts
+++ b/arch/powerpc/boot/dts/p1020rdb.dts
@@ -23,7 +23,7 @@
/* NOR, NAND Flashes and Vitesse 5 port L2 switch */
ranges = <0x0 0x0 0x0 0xef000000 0x01000000
- 0x1 0x0 0x0 0xffa00000 0x00040000
+ 0x1 0x0 0x0 0xff800000 0x00040000
0x2 0x0 0x0 0xffb00000 0x00020000>;
};
diff --git a/arch/powerpc/boot/dts/p1020rdb_36b.dts b/arch/powerpc/boot/dts/p1020rdb_36b.dts
index bdbdb60..7c53ad7 100644
--- a/arch/powerpc/boot/dts/p1020rdb_36b.dts
+++ b/arch/powerpc/boot/dts/p1020rdb_36b.dts
@@ -23,7 +23,7 @@
/* NOR, NAND Flashes and Vitesse 5 port L2 switch */
ranges = <0x0 0x0 0xf 0xef000000 0x01000000
- 0x1 0x0 0xf 0xffa00000 0x00040000
+ 0x1 0x0 0xf 0xff800000 0x00040000
0x2 0x0 0xf 0xffb00000 0x00020000>;
};
--
1.6.4
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