[linuxppc-release] [PATCH 1/2] powerpc: document the FSL MPIC message register binding

Yoder Stuart-B08248 B08248 at freescale.com
Tue Feb 21 01:00:20 EST 2012



> -----Original Message-----
> From: Wood Scott-B07421
> Sent: Friday, February 17, 2012 6:48 PM
> To: Yoder Stuart-B08248
> Cc: Jia Hongtao-B38951; linuxppc-dev at lists.ozlabs.org; meador_inge at mentor.com; Li Yang-R58472
> Subject: Re: [linuxppc-release] [PATCH 1/2] powerpc: document the FSL MPIC message register
> binding
> 
> On 02/17/2012 09:50 AM, Yoder Stuart-B08248 wrote:
> >
> >
> >> -----Original Message-----
> >> From: linuxppc-release-bounces at linux.freescale.net
> >> [mailto:linuxppc-release- bounces at linux.freescale.net] On Behalf Of
> >> Jia Hongtao-B38951
> >> Sent: Thursday, February 16, 2012 8:49 PM
> >> To: linuxppc-dev at lists.ozlabs.org
> >> Cc: meador_inge at mentor.com; Li Yang-R58472; Jia Hongtao-B38951
> >> Subject: [linuxppc-release] [PATCH 1/2] powerpc: document the FSL
> >> MPIC message register binding
> >>
> >> This binding documents how the message register blocks found in some
> >> FSL MPIC implementations shall be represented in a device tree.
> >>
> >> Signed-off-by: Meador Inge <meador_inge at mentor.com>
> >> Signed-off-by: Jia Hongtao <B38951 at freescale.com>
> >> Signed-off-by: Li Yang <leoli at freescale.com>
> >> ---
> >>  .../devicetree/bindings/powerpc/fsl/mpic-msgr.txt  |   62 ++++++++++++++++++++
> >>  1 files changed, 62 insertions(+), 0 deletions(-)  create mode
> >> 100644 Documentation/devicetree/bindings/powerpc/fsl/mpic-msgr.txt
> >>
> >> diff --git
> >> a/Documentation/devicetree/bindings/powerpc/fsl/mpic-msgr.txt
> >> b/Documentation/devicetree/bindings/powerpc/fsl/mpic-msgr.txt
> >> new file mode 100644
> >> index 0000000..b4ae70e
> >> --- /dev/null
> >> +++ b/Documentation/devicetree/bindings/powerpc/fsl/mpic-msgr.txt
> >> @@ -0,0 +1,62 @@
> >> +* FSL MPIC Message Registers
> >> +
> >> +This binding specifies what properties must be available in the
> >> +device tree representation of the message register blocks found in
> >> +some FSL MPIC implementations.
> >> +
> >> +Required properties:
> >> +
> >> +    - compatible: Specifies the compatibility list for the message register
> >> +      block.  The type shall be <string> and the value shall be of the form
> >> +      "fsl,mpic-v<version>-msgr", where <version> is the version number of
> >> +      the MPIC containing the message registers.
> >
> > The type for compatibles is a <string-list>.
> >
> >> +    - reg: Specifies the base physical address(s) and size(s) of the
> >> +      message register block's addressable register space.  The type shall be
> >> +      <prop-encoded-array>.
> >> +
> >> +    - interrupts: Specifies a list of interrupt source and level-sense pairs.
> >> +      The type shall be <prop-encoded-array>.  The length shall be equal to
> >> +      the number of registers that are available for receiving interrupts.
> >
> > How many interrupts are there?   If more than 1,  this is where
> > you need to specify what each interrupt is for.
> 
> They aren't "for" anything in particular -- each interrupt is associated with a message
> register.  The binding does say that the number of interrupts corresponds to the bits set in
> the receive mask.

Then make that clear, it also should use the term 'interrupt-specifier'
not 'interrupt source and level-sense pairs', which implies a particular
parent interrupt controller configuration.

Stuart



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