[linuxppc-release] [PATCH 1/2] powerpc: document the FSL MPIC message register binding

Yoder Stuart-B08248 B08248 at freescale.com
Sat Feb 18 02:50:13 EST 2012



> -----Original Message-----
> From: linuxppc-release-bounces at linux.freescale.net [mailto:linuxppc-release-
> bounces at linux.freescale.net] On Behalf Of Jia Hongtao-B38951
> Sent: Thursday, February 16, 2012 8:49 PM
> To: linuxppc-dev at lists.ozlabs.org
> Cc: meador_inge at mentor.com; Li Yang-R58472; Jia Hongtao-B38951
> Subject: [linuxppc-release] [PATCH 1/2] powerpc: document the FSL MPIC message register
> binding
> 
> This binding documents how the message register blocks found in some FSL MPIC implementations
> shall be represented in a device tree.
> 
> Signed-off-by: Meador Inge <meador_inge at mentor.com>
> Signed-off-by: Jia Hongtao <B38951 at freescale.com>
> Signed-off-by: Li Yang <leoli at freescale.com>
> ---
>  .../devicetree/bindings/powerpc/fsl/mpic-msgr.txt  |   62 ++++++++++++++++++++
>  1 files changed, 62 insertions(+), 0 deletions(-)  create mode 100644
> Documentation/devicetree/bindings/powerpc/fsl/mpic-msgr.txt
> 
> diff --git a/Documentation/devicetree/bindings/powerpc/fsl/mpic-msgr.txt
> b/Documentation/devicetree/bindings/powerpc/fsl/mpic-msgr.txt
> new file mode 100644
> index 0000000..b4ae70e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/fsl/mpic-msgr.txt
> @@ -0,0 +1,62 @@
> +* FSL MPIC Message Registers
> +
> +This binding specifies what properties must be available in the device
> +tree representation of the message register blocks found in some FSL
> +MPIC implementations.
> +
> +Required properties:
> +
> +    - compatible: Specifies the compatibility list for the message register
> +      block.  The type shall be <string> and the value shall be of the form
> +      "fsl,mpic-v<version>-msgr", where <version> is the version number of
> +      the MPIC containing the message registers.

The type for compatibles is a <string-list>.

> +    - reg: Specifies the base physical address(s) and size(s) of the
> +      message register block's addressable register space.  The type shall be
> +      <prop-encoded-array>.
> +
> +    - interrupts: Specifies a list of interrupt source and level-sense pairs.
> +      The type shall be <prop-encoded-array>.  The length shall be equal to
> +      the number of registers that are available for receiving interrupts.

How many interrupts are there?   If more than 1,  this is where
you need to specify what each interrupt is for.

> +Optional properties:
> +
> +    - mpic-msgr-receive-mask: Specifies what registers in the containing block
> +      are allowed to receive interrupts.  The value is a bit mask where a set
> +      bit at bit 'n' indicates that message register 'n' can receive interrupts.
> +      The type shall be <prop-encoded-array>.  If not present, then all of
> +      the message registers in the block are available.

Your example implies that this is 1 32-bit cell.  If that is the case then
this really should be of type '<u32>'.




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