[PATCH] powerpc: Fix xmon for systems without MSR[RI]

Jimi Xenidis jimix at pobox.com
Thu Sep 1 07:08:48 EST 2011


On Aug 30, 2011, at 1:08 PM, Scott Wood wrote:

> On 08/30/2011 01:11 AM, Benjamin Herrenschmidt wrote:
>> On Mon, 2011-08-08 at 16:25 -0500, Jimi Xenidis wrote:
>>> From: David Gibson <dwg at au1.ibm.com>
>>> 
>>> Based on patch by David Gibson <dwg at au1.ibm.com>
>>> 
>>> xmon has a longstanding bug on systems which are SMP-capable but lack
>>> the MSR[RI] bit.  In these cases, xmon invoked by IPI on secondary
>>> CPUs will not properly keep quiet, but will print stuff, thereby
>>> garbling the primary xmon's output.  This patch fixes it, by ignoring
>>> the RI bit if the processor does not support it.
>>> 
>>> There's already a version of this for 4xx upstream, which we'll need
>>> to extend to other RI-lacking CPUs at some point.  For now this adds
>>> BookE processors to the mix.
>> 
>> Don't freescale one have RI ?
> 
> e500mc does.

hmm, according to the ISA, MSR[RI] is only defined for Book3s and is not defined for Book3e
Should we scope it to just book3e?
-jx

> 
> e500v2 doesn't -- if a machine check happens while MSR[ME]=0, it causes
> a checkstop.
> 
> -Scott
> 



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