[PATCH 1/5] powerpc/85xx: issue 15 EOI after core reset for FSL CoreNet devices

[Segher Boessenkool]

> @@ -1759,6 +1760,12 @@ void mpic_reset_core(int cpu)
>  	pir &= ~(1 << cpuid);
>  	mpic_write(mpic->gregs, MPIC_INFO(GREG_PROCESSOR_INIT), pir);
>  	mpic_read(mpic->gregs, MPIC_INFO(GREG_PROCESSOR_INIT));
> +
> +	/* Perform 15 EOI on each reset core to clear pending interrupts */
> +	for (i = 0; i < 15; i++) {
> +		_mpic_write(mpic->reg_type, &mpic->cpuregs[cpuid],
> +				      MPIC_CPU_EOI, 0);
> +	}

This is generic code, right?  Please add info to the comment about
which devices need this quirk, then.


Segher