FW: P4080 device tree problems with fsl dpaa ...

[Robert Sciuk]

> -----Original Message-----
> From: patrickdepinguin at gmail.com [mailto:patrickdepinguin at gmail.com] On
> Behalf Of Thomas De Schampheleire
> Sent: Monday, October 17, 2011 5:01 AM
> To: Robert Sciuk
> Cc: linuxppc-dev at lists.ozlabs.org
> Subject: Re: FW: P4080 device tree problems with fsl dpaa ...
> 
> Hi Robert,

[my stuff snipped]
> 
> > I have no idea what an OH binding is, what it might look like, and
> what it entails, but I think that it might be a significant factor in
> our not seeing a working interface.  Has anyone any experience with
> dpaa device trees, and configuration?  Any pointers?  Any docs? Shots
> in the dark?
> 
> We are using a device tree on p4080 with a dpaa configuration, yes.
> I also don't know about the OH bindings, but I have a vague memory of
> us having that message too, and it not being a real problem.
> 

Other indicators concur with your assessment, and suggest that I back those nodes out as well.  


> What I do know is that the device tree is very easy to get wrong, and
> that it should match your hardware precisely. I'm not using the same
> configuration as you are (there are no MDIO devices between our phy
> and dTSEC) so the device tree looks a little different.

Would it be possible to have a look at the relevant portions of your dev tree?



> 
> Are you using the reference design or is this custom?

This is a custom design, and is an ATCA blade.


> Did you have a look at the device tree in the linux kernel sources?
> (arch/powerpc/boot/dts/p4080.dts). Does this configuration match
> yours? In that configuration, there are separate nodes of type
> p4080ds-mdio, inside the main mdio node.

We actually used the 36 bit tree (we plan to ship the boards with 16G initially, and up to 32G eventually).  I've also re-worked the tree from the LTIB (System Builder) in an attempt to get this to work.  Our design differs significantly from the P4080DS in that there exists no MUX between the bus and phy ... and there is no PIXIS FPGA to do all the clocking and startup stuff. 

I've modified u-boot to assign mac addresses based upon our OUI, and the MACs all seem to be configured properly coming out of firmware, the ifconfig on the Linux side recognizes all of our 6 interfaces ...


> 
> Is your phy configured correctly? Are there any boot messages about
> this? Can you check its registers?
> The same for the mdio.

There is some question about the TBI initialization, and we are tracing that as we speak ...

> 
> Some generic pointers:
> * If you set CONFIG_PROC_DEVICETREE in the kernel config, you can read
> out the device-tree at runtime in /proc/device-tree. This helps in
> verifying whether the nodes you programmed actually appear in the
> running system.

Ack.

> 
> * The /sys/devices directory can also be useful in identifying
> potential problems for unfound devices (which does not appear to be
> your case).
> 
 
Ack.  Also using /proc/interrupts ...


> * Can you step through the code, e.g. with a JTAG debugger? Try
> following the transmit path in the dpaa_eth driver. Maybe something
> errors out prematurely.
> 

With some headaches ... using codewarrior, and getting assembly level tracing ...

> Best regards,
> Thomas