[PATCH 08/29] powerpc/85xx: Rework MPC8536DS device trees

[Scott Wood]

On Thu, Nov 17, 2011 at 01:16:00AM -0600, Kumar Gala wrote:
> Utilize new split between board & SoC, and new SoC device trees split
> into pre & post utilizing 'template' includes for SoC IP blocks.
> 
> Other changes include:
> * Moved to specifying interrupt-parent for mpic at root
> * Moved to 4-cell mpic interrupt cells to support MPIC timers
> * Added localbus node, but no chipselect details at this point
> * Reworked PCIe nodes to allow supportin IRQs for controller (errors)
> * and moved
>   PCI device IRQs down to virtual bridge level
> * Moved mdio nodes up one level instead of under tsec nodes
> * Added GPIO controller node to MPC8536 SoC template
>   [ marked as MPC8572 compatiable to get errata handling that applies ]
> * Added missing cache-line-size & cache-size properties missing from
>   L2-cache node
> * Added IP level IEEE 1588 / ptp timer node
> 
> Signed-off-by: Kumar Gala <galak at kernel.crashing.org>
> ---
>  arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi |  248 ++++++++++++++
>  arch/powerpc/boot/dts/fsl/mpc8536si-pre.dtsi  |   63 ++++

OK, so rather than ask again what the real reason for this is, I went
ahead and tried it without the pre/post split.

It seems the issue with putting everything in "pre" is that we can't
rewrite a node name.  We can let the board supply its own reg/ranges, but
not the unit address of a previously-defined node.

Putting everything in post works, provided the setting of board-level
compatible is removed from the "si" file.  And since the board file is
driving this process, if it really wanted to override something from the
"si" file, it could do so after the include (just as it would currently
need to do to override anything in "post").

-Scott