[RFC PATCH 08/17] powerpc/e500: Remove conditional "lwsync" substitution
Kumar Gala
galak at kernel.crashing.org
Fri Nov 11 03:42:25 EST 2011
On Nov 10, 2011, at 10:31 AM, Scott Wood wrote:
> On Thu, Nov 10, 2011 at 07:40:04AM -0600, Kumar Gala wrote:
>>
>> On Nov 9, 2011, at 6:07 PM, Kyle Moffett wrote:
>>
>>> As FreeScale e500 systems have different cacheline sizes from e500mc, it
>>> is basically impossible for the kernel to support both in a single
>>> system image at present.
>>>
>>> Given that one is SPE-float and the other is classic-float, they are not
>>> generally userspace-compatible either.
>>>
>>> This patch updates the conditional to depend on whether the system is
>>> actually targetting an "e500" or "e500mc" core and entirely removes the
>>> unused sync-to-lwsync-replacement on e500v1/e500v2 systems.
>>>
>>> Signed-off-by: Kyle Moffett <Kyle.D.Moffett at boeing.com>
>>> ---
>>> arch/powerpc/include/asm/synch.h | 16 ++++------------
>>> 1 files changed, 4 insertions(+), 12 deletions(-)
>>
>> Nak, we can run an e500mc in a mode that is compatible with e500v1/v2. I see no reason to change the support we have there.
>
> What "mode" do you mean? DCBZ32? We don't support using that currently,
> and I'd imagine the performance implication would be such that you'd
> never want to do it unless it's the only way to make some piece of legacy
> software work.
Correct, DCBZ32, we've had customers that go down this path.
>> I see no reason to change the support we have there.
>
> No reason to remove complexity that is not needed, and is not planned to
> be needed?
I'd rather wait for at least 2 years for e500mc devices to have further deployment before we'd remove this.
- k
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