[PATCH] powerpc/85xx: disable timebase synchronization under the hypervisor

[Scott Wood]

On Thu, 23 Jun 2011 12:33:40 -0500
Timur Tabi <timur at freescale.com> wrote:

> Scott Wood wrote:
> > From Power ISA 2.06B, book III-E, section 9.2.1:
> > 
> > Virtualized Implementation Note:
> > 
> > In virtualized implementations, TBU and TBL are
> > read-only.
> 
> But does that mean that a guest should never be allowed to modify a virtualized
> timebase register, even if the hypervisor can support it?

The book3e mtspr writeup doesn't appear to specify the behavior when
writing to a read-only SPR, so perhaps you could argue that something other
than a no-op is implementation-specific behavior.

For a guest, the safe thing is to not write to those registers unless you
specifically know it's going to do what you want under a particular
implementation.  It's not specifically a Topaz limitation.

> >> > So a generic HV mode bit is not going to help me, unless there's also a bit
> >> > that's specific to our hypervisor.  And even then, we would need some way to
> >> > differentiate among different versions of our hypervisor, in case some future
> >> > version adds timebase support. 
> 
> > That's very unlikely to happen.
> 
> I know. I was just being architecturally pedantic.

It's not as if it would hurt anything to ignore such a capability.

> > Ideally we would avoid doing this sync even when not running under a
> > hypervisor, as long as firmware has done the sync, and kexec hasn't messed
> > it up.  Besides being a waste of boot time, the firmware's sync is
> > probably tighter since it can use a platform-specific mechanism to start all
> > the timebases at once.
> 
> I agree with that, but for now, I need to work around that kexec "limitation".

Is there any way we can detect whether we booted via kexec (as opposed to
just having kexec support enabled), and only do the sync in that case?

-Scott