[PATCH] powerpc: Fix xmon for systems without MSR[RI]

[Benjamin Herrenschmidt]

On Mon, 2011-08-08 at 16:25 -0500, Jimi Xenidis wrote:
> From: David Gibson <dwg at au1.ibm.com>
> 
> Based on patch by David Gibson <dwg at au1.ibm.com>
> 
> xmon has a longstanding bug on systems which are SMP-capable but lack
> the MSR[RI] bit.  In these cases, xmon invoked by IPI on secondary
> CPUs will not properly keep quiet, but will print stuff, thereby
> garbling the primary xmon's output.  This patch fixes it, by ignoring
> the RI bit if the processor does not support it.
> 
> There's already a version of this for 4xx upstream, which we'll need
> to extend to other RI-lacking CPUs at some point.  For now this adds
> BookE processors to the mix.

Don't freescale one have RI ?

Cheers,
Ben.

> Signed-off-by: Jimi Xenidis <jimix at pobox.com>
> ---
>  arch/powerpc/xmon/xmon.c |    4 ++--
>  1 files changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
> index 42541bb..fdb2f7e 100644
> --- a/arch/powerpc/xmon/xmon.c
> +++ b/arch/powerpc/xmon/xmon.c
> @@ -340,8 +340,8 @@ int cpus_are_in_xmon(void)
>  
>  static inline int unrecoverable_excp(struct pt_regs *regs)
>  {
> -#ifdef CONFIG_4xx
> -	/* We have no MSR_RI bit on 4xx, so we simply return false */
> +#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
> +	/* We have no MSR_RI bit on 4xx or Book3e, so we simply return false */
>  	return 0;
>  #else
>  	return ((regs->msr & MSR_RI) == 0);