[PATCH V4] POWER: perf_event: Skip updating kernel counters if register value shrinks
Eric B Munson
emunson at mgebm.net
Wed Apr 27 23:20:54 EST 2011
On Wed, 27 Apr 2011, David Laight wrote:
>
> > prev and val are both 64 bit variables holding 32 bit numbers, we do
> not
> > accumulate in either, they are both replaced by values directly from
> the
> > registers.
> > So prev > val will not always be true.
>
> The code seems to be:
> prev = local64_read(&event->hw.prev_count);
> val = read_pmc(event->hw.idx);
> delta = check_and_compute_delta(prev, val);
> local64_add(delta, &event->count);
> Which looks very much like 'prev' being a 64bit counter generated
> from the 32bit pmc register.
>
Which implies that it will only ever be 32 bits wide, just stored in 64.
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 490 bytes
Desc: Digital signature
URL: <http://lists.ozlabs.org/pipermail/linuxppc-dev/attachments/20110427/bcfee755/attachment.pgp>
More information about the Linuxppc-dev
mailing list