[PATCH 10/15] powerpc: Define slb0_limit() for BOOK3E

Benjamin Herrenschmidt benh at kernel.crashing.org
Tue Apr 19 08:50:39 EST 2011

On Mon, 2011-04-18 at 17:30 -0500, Kumar Gala wrote:
> > On Mon, 2011-04-18 at 07:42 -0500, Kumar Gala wrote:
> >> Let's rename this function to something 'linear_map'.  As on FSL
> >> Book-E 64 we do things a bit differently and have more covered in
> >> linear map than 1G
> > 
> > It's not quite linear_map. It's whatever can be accessed without
> taking
> > exceptions. IE. What is bolted.
> > 
> > It should probably go into a variable initialized by the mm code
> tho.
> > 
> > Cheers,
> > Ben.
> Is this 'ppc64_rma_size' ? 

Not quite either :-)

The RMA (on server) is the amount of memory that is accessible in real
mode (with MMU off).

SLB0 is segment 0, which is 256M or 1T depending on what segment size we
use, and is a bolted segment in Linux. Thus all accesses to SLB0 are
guaranteed to not generate an SLB miss fault. Since on server our linear
mapping is bolted in the hash, what that means is that any access to
memory in segment 0 is guaranteed to not take an exception (ie not
clobber SRR0/1 for example).

We re-use the SLB0 concept on BookE to represent the bolted portion of
the linear mapping since it has the same characteristics, ie, accesses
will not cause an exception that can clobber SRR0/1.

The patch Michael posted is indeed a bit gross (it's my code btw :-) and
we'll need to clean it up, my idea is to have a global set by the
platform, but maybe we can have some generic code that performs a TLB
search for IPROT entries :-)


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