[PATCH v10 03/10] USB/ppc4xx: Add Synopsys DWC OTG Core Interface Layer (CIL)

[Felipe Balbi]

On Tue, Apr 05, 2011 at 12:38:03PM +0530, Keshava Munegowda wrote:
> > -----Original Message-----
> > From: Sergei Shtylyov [mailto:sshtylyov at mvista.com]
> > Sent: Saturday, April 02, 2011 12:26 AM
> > To: Tirumala Marri
> > Cc: Keshava Munegowda; linux-usb at vger.kernel.org;
> linuxppc-dev at lists.ozlabs.org; greg at kroah.com;
> > Fushen Chen; Mark Miesfeld
> > Subject: Re: [PATCH v10 03/10] USB/ppc4xx: Add Synopsys DWC OTG Core
> Interface Layer (CIL)
> >
> > Hello.
> >
> > Tirumala Marri wrote:
> >
> > >>> +void dwc_otg_core_init(struct core_if *core_if)
> > >>> +{
> > >>> +	u32 i;
> > >>> +	ulong global_reg = core_if->core_global_regs;
> > >>> +	struct device_if *dev_if = core_if->dev_if;
> > >>> +	u32 ahbcfg = 0;
> > >>> +	u32 i2cctl = 0;
> > >>> +	u32 gusbcfg;
> >
> > >> Tabify the declarations ;
> >
> > > [Marri] When I checked again in my source, I do see the tabs added
> before
> > > declarations.
> >
> >     He means that tabs should be between the variable's type and name,
> but
> > there's no such requirement actually.
> 
> I am sorry if there is no such requirement, since I had such comments and
> I fixed it and
> Now I have commented.

it's true we don't have that requirement, but it does look better when
we have many local variables. IMHO, whatever we can do to go easy on the
eyes, we should.

-- 
balbi