[PATCH] edac/mpc85xx: Limit setting/clearing of HID1[RFXE] to e500v1/v2 cores

[Kumar Gala]

On Mar 31, 2011, at 5:42 PM, Nishanth Aravamudan wrote:

> On 31.03.2011 [17:23:14 -0500], Kumar Gala wrote:
>> Only the e500v1/v2 cores have HID1[RXFE] so we should attempt to set or
>> clear this register bit on them.  Otherwise we get crashes like:
> 
> <snip>
> 
>> diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c
>> index b123bb3..5aef2ed 100644
>> --- a/drivers/edac/mpc85xx_edac.c
>> +++ b/drivers/edac/mpc85xx_edac.c
> 
> <snip>
> 
>> @@ -1209,10 +1215,15 @@ static void __exit mpc85xx_mc_restore_hid1(void *data)
>> static void __exit mpc85xx_mc_exit(void)
>> {
>> #ifdef CONFIG_FSL_SOC_BOOKE
>> -	on_each_cpu(mpc85xx_mc_restore_hid1, NULL, 0);
>> +	u32 pvr = mfspr(SPRN_PVR);
>> +
>> +	if ((PVR_VER(pvr) == PVR_VER_E500V1) ||
>> +	    (PVR_VER(pvr) == PVR_VER_E500V2)) {
>> +		on_each_cpu(mpc85xx_mc_restore_hid1, NULL, 0);
>> +	}
>> #endif
>> #ifdef CONFIG_PCI
>> -	of_unregister_platform_driver(&mpc85xx_pci_err_driver);
>> +	of_unregistr_platform_driver(&mpc85xx_pci_err_driver);
> 
> Unintended change?

Yep, thanks for catching.

- k