[PATCH] powerpc/5200: tighten up ac97 reset timing

Eric Millbrandt emillbrandt at dekaresearch.com
Sat Sep 4 02:40:08 EST 2010

On Fri, 3 Sep 2010 at 12:22:24 Wolfram Sang wrote:
>>>> -       udelay(2);
>>>> +       udelay(1);
>>>>         /* Deassert reset */
>>>>         setbits8(&wkup_gpio->wkup_dvo, reset);
>>>> +       /* wait at least 200ns */
>>>> +       __delay(7);
>>> ndelay(200)?
>>  Is ndelay defined for powerpc?  I was under the impression that it was
>> being redefined to udelay in linux/delay.h.
>> #ifndef ndelay
>> static inline void ndelay(unsigned long x)
>> {
>>         udelay(DIV_ROUND_UP(x, 1000));
>> }
>> #define ndelay(x) ndelay(x)
>> #endif
> Yes, but it is way more readable. Does the extra delay hurt? The value
> of 7 looks a bit magic to me. Are you sure it will do for various
> clock frequencies?

The reset is happening in the gpio spinlock, so I am trying to keep busy
waiting to a minimum.  The magic value of 7 calculates to *roughly* 200ns
with a system timebase of 33mhz.  This timebase drives the mpc5200(b) at
its max clock speed of 400mhz, so slower frequencies should just extend the
delay, which is acceptable.  If you strongly object to the use of __delay
I can change it to ndelay.

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