[PATCH] powerpc/fsl: 85xx: add cache-sram support

Rai Harninder-B01044 B01044 at freescale.com
Wed Oct 13 04:02:19 EST 2010


Currently the design is that we divide the sram portion into 2 equal
parts for AMP
That was the part of initial requirement
Do we want to remove that?


Thanks and Regards
Harry++

> -----Original Message-----
> From: Kumar Gala [mailto:galak at kernel.crashing.org]
> Sent: Tuesday, October 12, 2010 7:40 PM
> To: Rai Harninder-B01044
> Cc: linuxppc-dev at lists.ozlabs.org
> Subject: Re: [PATCH] powerpc/fsl: 85xx: add cache-sram support
> 
> 
> On Oct 12, 2010, at 5:25 AM, <harninder.rai at freescale.com>
> <harninder.rai at freescale.com> wrote:
> 
> >
> > +static int __devinit mpc85xx_l2ctlr_of_probe(struct platform_device
> *dev,
> > +					  const struct of_device_id
*match) {
> > +	long rval;
> > +	unsigned int rem;
> > +	unsigned char ways;
> > +	const unsigned int *prop;
> > +	unsigned int l2cache_size;
> > +	struct device_node *np;
> > +	int i = 0;
> > +	bool amp = 0;
> > +	struct sram_parameters sram_params;
> > +	static char *compatible_list[] = {
> > +					"fsl,MPC85XXRDB-CAMP",
> > +					"fsl,P2020DS-CAMP",
> > +					NULL
> > +				};
> > +
> 
> Remove this AMP stuff.  We specify the cache-sram-size & cache-sram-
> offset so for the AMP kernels these can be set as needed.
> 
> - k



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