[RFC: PATCH 08/13] powerpc/476: define specific cpu table entry for DD1 and DD1.1 cores

[Dave Kleikamp]

On Fri, 2010-03-05 at 03:15 -0600, Kumar Gala wrote:
> On Mar 4, 2010, at 11:06 AM, Hollis Blanchard wrote:
> 
> > On Mon, Mar 1, 2010 at 11:13 AM, Dave Kleikamp <shaggy at linux.vnet.ibm.com> wrote:
> > powerpc/476: define specific cpu table entry for DD1 and DD1.1 cores
> > 
> > From: Benjamin Herrenschmidt <benh at kernel.crashing.org>
> > 
> > There are still some unstable bits on the DD1 and DD1.1 cores.  Don't use
> > the FPU or the tlbivax operation.  Define CPU_FTR_476_DD1 and
> > CPU_FTR_476_DD1_1 for additional workarounds in later patches.
> > 
> > The DD1 core requires workarounds triggered by both CPU_FTR_476_DD1
> > and CPU_FTR_476_DD1_1.  the DD1.1 core only needs CPU_FTR_476_DD1_1
> > defined.
> > 
> > Isn't the policy generally not to commit workarounds for
> early/errataful hardware which will not be seen in the real world?
> Otherwise, every new half-broken core could burn a bunch of feature
> bits...
> > 
> > -Hollis
> 
> I'm with Hollis.  Cluttering the code with non-production errata could
> get very ugly as well as burning feature bits up like made.

Ben's going to make the decision on whether or not these patches should
be included into mainline.  I'd be happy maintaining them separately if
not.  I'm separating out the DD1 workaround from the others, since it's
less likely that one will be needed long-term.

Thanks,
Shaggy
-- 
David Kleikamp
IBM Linux Technology Center