[PATCH 18/26] KVM: PPC: KVM PV guest stubs

[Benjamin Herrenschmidt]

On Sun, 2010-06-27 at 11:47 +0200, Alexander Graf wrote:
> I did that at first. It breaks. During the patching we may take  
> interrupts (pahe faults for example) that contain just patched  
> instructions. And really, hell breaks loose if we don't flush it  
> immediately :). I was hoping at first a 32 bit replace would be
> atomic  
> in cache, but the cpu tried to execute invalid instructions, so it  
> must have gotten some intermediate state.

A 32-bit aligned store -is- atomic. The other threads/cpu will see
either the old or the new instruction, nothing in between.

Cheers,
Ben.