[PATCH 3/3] fsl_rio: fix non-standard HID1 register access

[Kumar Gala]

On Jun 18, 2010, at 12:46 AM, Geert Uytterhoeven wrote:

> On Fri, Jun 18, 2010 at 07:29, Li Yang <leoli at freescale.com> wrote:
>> The access to HID1 register is only legitimate for e500 v1/v2 cores.
>> 
>> Signed-off-by: Li Yang <leoli at freescale.com>
>> ---
>>  arch/powerpc/sysdev/fsl_rio.c |    7 +++++--
>>  1 files changed, 5 insertions(+), 2 deletions(-)
>> 
>> diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch/powerpc/sysdev/fsl_rio.c
>> index 954a754..785a882 100644
>> --- a/arch/powerpc/sysdev/fsl_rio.c
>> +++ b/arch/powerpc/sysdev/fsl_rio.c
>> @@ -1523,9 +1523,12 @@ int fsl_rio_setup(struct of_device *dev)
>>  #ifdef CONFIG_E500
>>        saved_mcheck_exception = ppc_md.machine_check_exception;
>>        ppc_md.machine_check_exception = fsl_rio_mcheck_exception;
>> -#endif
>> -       /* Ensure that RFXE is set */
>> +
>> +#ifndef CONFIG_E500MC
>> +       /* Ensure that RFXE is set on e500 v1/v2 */
>>        mtspr(SPRN_HID1, (mfspr(SPRN_HID1) | 0x20000));
>> +#endif /* !E500MC */
>> +#endif /* E500 */
>> 
>>        return 0;
>>  err:
> 
> This prevents you from building a kernel for both normal E500 and E500MC.
> 
> Gr{oetje,eeting}s,

Also, not a fan of the magic number 0x20000.

- k