64-bit ppc rwsem
Benjamin Herrenschmidt
benh at kernel.crashing.org
Tue Aug 24 08:01:25 EST 2010
On Mon, 2010-08-23 at 15:44 +0200, Arnd Bergmann wrote:
>
> * Alpha has an optimization for the uniprocessor case, where the atomic
> instructions get turned into nonatomic additions. The spinlock based
> version uses no locks on UP but disables interrupts for reasons I don't
> understand (nothing running at interrupt time should try to access an rwsem).
> Should the generic version do the same as Alpha?
I've seen drivers in the past do trylocks at interrupt time ... tho I
agree it sucks.
> * Is there any architecture that would still benefit from having a separate
> rwsem implementation? AFAICT all the remaining ones are just variations of
> the same concept of using cmpxchg (or xadd in case of x86), which is what
> atomics typically end up doing anyway.
It depends how sensitive rwsems are.
The "generic" variant based on atomic's and cmpxchg on powerpc is
sub-optimal in the sense that it has stronger memory barriers that would
be necessary (atomic_inc_return for example has both acquire and
release).
But that vs. one more pile of inline asm, we decided it wasn't hot
enough a spot for us to care back then.
Cheers,
Ben.
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