[PATCH 2/9] RapidIO, powerpc/85xx: modify RIO port-write interrupt handler

[Micha Nelissen]

Alexandre Bounine wrote:
> - Rearranged RIO port-write interrupt handling to perform message buffering
> as soon as possible.

I don't understand this comment: you still schedule work to read the 
port-write queue; so how is this message buffering performed as soon as 
possible?

> - Modified to disable port-write controller when clearing Transaction Error (TE)
> bit.
>  	/* Schedule deferred processing if PW was received */
> -	if (ipwsr & RIO_IPWSR_QFI) {
> +	if ((ipwmr & RIO_IPWMR_QFIE) && (ipwsr & RIO_IPWSR_QFI)) {

Why check the QFIE bit also?

> +pw_done:
> +	if (epwisr & 0x80000000) {

Magic value.

Micha