[PATCH 2/4] powerpc/mpc5121: add USB host support

Grant Likely grant.likely at secretlab.ca
Wed Apr 28 03:12:39 EST 2010


On Tue, Apr 27, 2010 at 10:11 AM, Anatolij Gustschin <agust at denx.de> wrote:
> Platform specific code for MPC5121 USB Host support.
>
> The patch also contains changes to FSL EHCI platform driver
> needed to support MPC5121 USB controllers. MPC5121 Rev 2.0
> silicon EHCI registers are in big endian format. The
> appropriate flags are set using the information in the
> platform data structure. 83xx system interface registers
> are not available on 512x, so the access to these registers
> is isolated for 512x. Furthermore the USB controller clock
> must be enabled before 512x register access which is done
> by providing platform specific init callback.
>
> The 512x internal USB PHY doesn't provide supply voltage.
> For boards using different power switches allow specifying
> DRVVBUS and PWR_FAULT signal polarity of the MPC5121 internal
> PHY using "fsl,invert-drvvbus" and "fsl,invert-pwr-fault"
> properties in the device tree USB node.
>
> Signed-off-by: Bruce Schmid <duck at freescale.com>
> Signed-off-by: Anatolij Gustschin <agust at denx.de>
> Cc: David Brownell <dbrownell at users.sourceforge.net>
> Cc: Greg Kroah-Hartman <gregkh at suse.de>
> Cc: Grant Likely <grant.likely at secretlab.ca>
> Cc: Kumar Gala <galak at kernel.crashing.org>
> Cc: devicetree-discuss at lists.ozlabs.org
> ---
>  Documentation/powerpc/dts-bindings/fsl/usb.txt |   22 ++++
>  arch/powerpc/platforms/512x/Kconfig            |    3 +
>  arch/powerpc/platforms/512x/Makefile           |    2 +-
>  arch/powerpc/platforms/512x/mpc5121_usb.c      |  131 ++++++++++++++++++++++++
>  arch/powerpc/platforms/512x/mpc512x.h          |    1 +
>  arch/powerpc/platforms/512x/mpc512x_shared.c   |    1 +
>  arch/powerpc/sysdev/fsl_soc.c                  |   20 ++++
>  arch/powerpc/sysdev/fsl_soc.h                  |    9 ++
>  drivers/usb/host/ehci-fsl.c                    |  111 +++++++++++++++------
>  drivers/usb/host/ehci-fsl.h                    |   19 ++++-
>  drivers/usb/host/ehci-mem.c                    |    2 +-
>  include/linux/fsl_devices.h                    |   13 +++
>  12 files changed, 301 insertions(+), 33 deletions(-)
>  create mode 100644 arch/powerpc/platforms/512x/mpc5121_usb.c
>
> diff --git a/Documentation/powerpc/dts-bindings/fsl/usb.txt b/Documentation/powerpc/dts-bindings/fsl/usb.txt
> index b001524..bd5723f 100644
> --- a/Documentation/powerpc/dts-bindings/fsl/usb.txt
> +++ b/Documentation/powerpc/dts-bindings/fsl/usb.txt
> @@ -8,6 +8,7 @@ and additions :
>  Required properties :
>  - compatible : Should be "fsl-usb2-mph" for multi port host USB
>    controllers, or "fsl-usb2-dr" for dual role USB controllers
> +   or "fsl,mpc5121-usb2-dr" for dual role USB controllers of MPC5121
>  - phy_type : For multi port host USB controllers, should be one of
>    "ulpi", or "serial". For dual role USB controllers, should be
>    one of "ulpi", "utmi", "utmi_wide", or "serial".
> @@ -33,6 +34,12 @@ Recommended properties :
>  - interrupt-parent : the phandle for the interrupt controller that
>    services interrupts for this device.
>
> +Optional properties :
> + - fsl,invert-drvvbus : boolean; for MPC5121 USB0 only. Indicates the
> +   port power polarity of internal PHY signal DRVVBUS is inverted.
> + - fsl,invert-pwr-fault : boolean; for MPC5121 USB0 only. Indicates
> +   the PWR_FAULT signal polarity is inverted.
> +
>  Example multi port host USB controller device node :
>        usb at 22000 {
>                compatible = "fsl-usb2-mph";
> @@ -57,3 +64,18 @@ Example dual role USB controller device node :
>                dr_mode = "otg";
>                phy = "ulpi";
>        };
> +
> +Example dual role USB controller device node for MPC5121ADS:
> +
> +       usb at 4000 {
> +               compatible = "fsl,mpc5121-usb2-dr";
> +               reg = <0x4000 0x1000>;
> +               #address-cells = <1>;
> +               #size-cells = <0>;
> +               interrupt-parent = < &ipic >;
> +               interrupts = <44 0x8>;
> +               dr_mode = "otg";
> +               phy_type = "utmi_wide";
> +               fsl,invert-drvvbus;
> +               fsl,invert-pwr-fault;
> +       };

This modification to the device binding looks fine to me.

Cheers,
g.


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