Regression detecting memory size on PPC440EPx

Mike Nuss mike at terascala.com
Tue Oct 6 03:23:16 EST 2009


Mikhail Zolotaryov wrote:
> Hi Mike,
> 
> you wrote:
> "Row address bits : 13
> DDR0_02 = 0x020C0E01
> DDR0_42 = 0x00000006"
> 
> Register values above define that memory has 14 row address bits. The
> correct setting is (for CAS Latency = 3):
> DDR0_42 = 0x01000006
> 
> Best regards,
> Mikhail Zolotaryov
> 

Thank you! It was a bug in U-Boot (they were encoding that register
incorrectly). I'll submit a patch to them.

Mike


More information about the Linuxppc-dev mailing list