[PATCH 04/10] 8xx: Always pin kernel instruction TLB

[Joakim Tjernlund]

Dan Malek <dan at embeddedalley.com> wrote on 14/11/2009 19:08:43:
> On Nov 14, 2009, at 2:42 AM, Joakim Tjernlund wrote:
>
> > ..... Avoid this by always pinning
> > kernel instruction TLB space.
>
> You may as well map the data space, too, since you have
> reserved the entries.  Take advantage of that performance.
> Also, some processor variants have very few TLB entries,
> and may only reserve two entries (although the flag says
> reserve 4).  Ensure there are sufficient resources to do
> what you want.  This is the reason the option is configurable.

Scott had some concerns about pinning the data space too. That is
is why I left the data TLB pinning behind the the config option.

How to make better use of the remaining ITLB slots is tricky.
Somehow one would want to map at lest one to modules but I cannot see how.

 Jocke