mpc5200 fec error

Eric Millbrandt emillbrandt at dekaresearch.com
Thu May 21 02:41:38 EST 2009


> On Wed, May 20, 2009 at 9:42 AM, Eric Millbrandt
> <emillbrandt at dekaresearch.com> wrote:
>>> > I am able to reproduce the error using 2.6.29.2-rt11.  I was able to
>>> > mitigate the problem by raising the priority of the transmit irq.
>>> > However when running an NFS server on the pcm030 under high cpu load I
>>> > now get
>>> >
>>> > [  132.477503] net eth0: FEC_IEVENT_RFIFO_ERROR
>>> > [  132.892329] net eth0: FEC_IEVENT_RFIFO_ERROR
>>> > [  133.884109] net eth0: FEC_IEVENT_RFIFO_ERROR
>>> > [  134.876059] net eth0: FEC_IEVENT_RFIFO_ERROR
>>> >
>>> > Raising the priority of the rx irq does not seem to fix this problem
>>> > though.
>>>
>>> Hi Eric,
>>>
>>> This error has been seen before in non-rt kernels.  I haven't had the
>>> chance to track it down and kill it yet.  I believe there are locking
>>> issues associated with it.
>>
>> Uuuh, I recall this message. Kept me busy for some time :(
>>
>> You might try this patch which helped in our situation.
>>
>> ===========
>>
>> Subject: Enable XLB pipelining for MPC5200B
>> From: Wolfram Sang <w.sang at pengutronix.de>
>>
>> Enable pipelining as it helps getting rid of FEC problems.
>> Not intended for upstream, this must be dealt differently there.
>>
>> This patch is disabled by default. The bootloader should enable this feature.
>> So, this patch is only intended to be used where the bootloader does it in a
>> wrong manner and can't be replaced.
>>
>> Signed-off-by: Wolfram Sang <w.sang at pengutronix.de>
>> Acked-by: Juergen Beisert <j.beisert at pengutronix.de>
>>
>> ---
>>  arch/powerpc/platforms/52xx/mpc52xx_common.c |    7 +++++++
>>  1 file changed, 7 insertions(+)
>>
>> Index: arch/powerpc/platforms/52xx/mpc52xx_common.c
>> ===================================================================
>> --- arch/powerpc/platforms/52xx/mpc52xx_common.c.orig
>> +++ arch/powerpc/platforms/52xx/mpc52xx_common.c
>> @@ -107,6 +107,13 @@ mpc5200_setup_xlb_arbiter(void)
>>         */
>>        if ((mfspr(SPRN_SVR) & MPC5200_SVR_MASK) == MPC5200_SVR)
>>                out_be32(&xlb->config, in_be32(&xlb->config) | MPC52xx_XLB_CFG_PLDIS);
>> +#if 0
>> +       /*
>> +        * Enable pipelining, fixes FEC problems. The previous workaround is not
>> +        * needed, as we have an MPC5200B (not A).
>> +        */
>> +       out_be32(&xlb->config, in_be32(&xlb->config) & ~MPC52xx_XLB_CFG_PLDIS);
>> +#endif
>>
>>        iounmap(xlb);
>>  }
>>
>> --
>> Pengutronix e.K.                           | Wolfram Sang                |
>> Industrial Linux Solutions                 | http://www.pengutronix.de/  |
>>
>> Wolfram,
>>
>> Thanks, but no luck with this patch.  It was already setup correctly by U-Boot.
>
>
> I don't see where this gets enabled in the u-boot source. Have you
> added it locally?
>
> These are the only two I see:
> cpu/mpc5xxx/cpu_init.c: *(vu_long *)(MPC5XXX_XLBARB + 0x40) |= (1 << 13);
> cpu/mpc5xxx/cpu_init.c: *(vu_long *)(MPC5XXX_XLBARB + 0x40) |= (1 << 15);
>
>
> --
> Jon Smirl
> jonsmirl at gmail.com
>
> If you look a few more lines down you should see
> # if defined(CFG_XLB_PIPELINING)
>        /* Enable piplining */
>        *(vu_long *)(MPC5XXX_XLBARB + 0x40) &= ~(1 << 31);
> # endif
>
> I obtained the u-boot sources directly from phytec, for my phyCore, so I am not sure if they added it.

It is ok in main u-boot source. I just missed the lower section.

-- 
Jon Smirl
jonsmirl at gmail.com

It looks like the phy is never getting reset properly after the FEC_IEVENT_RFIFO_ERROR.  I threw some printk's into the fec mdio driver

/drivers/net/fec_mpc52xx_phy.c
  25 static int mpc52xx_fec_mdio_transfer(struct mii_bus *bus, int phy_id,
  26                 int reg, u32 value)
  27 {
  28         struct mpc52xx_fec_mdio_priv *priv = bus->priv;
  29         struct mpc52xx_fec __iomem *fec;
  30         int tries = 100;
  31 
  32         value |= (phy_id << FEC_MII_DATA_PA_SHIFT) & FEC_MII_DATA_PA_MSK;
  33         value |= (reg << FEC_MII_DATA_RA_SHIFT) & FEC_MII_DATA_RA_MSK;
  34 
  35         fec = priv->regs;
  36         out_be32(&fec->ievent, FEC_IEVENT_MII);
  37         out_be32(&priv->regs->mii_data, value);
  38 
  39         /* wait for it to finish, this takes about 23 us on lite5200b */
  40         while (!(in_be32(&fec->ievent) & FEC_IEVENT_MII) && --tries)
  41                 udelay(5);
  42 
  43         if (!tries) {
  44                 printk("Unable to reset phy\n");
  45                 return -ETIMEDOUT;
  46         }
  47 
  48         return value & FEC_MII_DATA_OP_RD ?
  49                 in_be32(&priv->regs->mii_data) & FEC_MII_DATA_DATAMSK : 0;
  50 }

and got this

[  127.085632] net eth0: FEC_IEVENT_RFIFO_ERROR
[  127.093401] Resetting FEC
[  127.096620] Unable to reset phy
[  127.322224] Unable to reset phy
[  128.321987] PHY: f0003000:00 - Link is Down
[  129.221034] net eth0: FEC_IEVENT_RFIFO_ERROR
[  129.228165] Resetting FEC
[  129.231384] Unable to reset phy
[  129.322286] Unable to reset phy
[  132.885863] net eth0: FEC_IEVENT_RFIFO_ERROR
[  132.893002] Resetting FEC
[  132.896176] Unable to reset phy
[  133.322202] Unable to reset phy
[  135.684793] net eth0: FEC_IEVENT_RFIFO_ERROR
[  135.691969] Resetting FEC
[  135.695192] Unable to reset phy
[  136.322530] Unable to reset phy
[  138.490805] net eth0: FEC_IEVENT_RFIFO_ERROR
[  138.497963] Resetting FEC
[  138.501135] Unable to reset phy
[  139.334200] Unable to reset phy

I guess I have to spend some quality time with the 5200 manual.


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