the question about the DDR1_Rcomp code for INTEL IXP4XX CPU?

[guojin02]

Hi,every one,


I want to drive the  Rcomp circuit for ixp460, because I found that the ixp460 could not power up on low temperature(-40 degree).  I want to add those code on start.s, follow is the instruction from ixp460 developer's manual. Does anyone can help me realize those code from No.4 to No.6?





Instrction:
1. The MCU applies the clock DDRI_CK[2:0] at power up along with system power
(clock frequency unknown).
2. The MCU must stabilize DDRI_CK[2:0] within 100 μs after power stabilizes.
3. The MCU holds the following control inputs inactive:
DDRI_RAS_N, DDRI_CAS_N, DDRI_WE_N, DDRI_CS_N[1:0]
The MCU then places all of the following data outputs and strobes in the High-Z
state:
DDRI_DQS[4:0], DDRI_DQ[31:0], DDR_CB[7:0]

4. The MCU then performs sixteen RCOMP calibration cycles which take an additional
34 ms. Software MUST wait until this time has elapsed before continuing with DDRI
SDRAM initialization.
5. Software overwrites the default value of register DDR_RCOMP_CSR3 (Hex Offset
Address = 0x0CC00 F570) with a new value of 0x0000 1000.
6. Software overwrites the default value of register DDR_DRIVE3 (Hex Offset Address
= 0x0CC00 F5AC) with a new value of 0x0002 08F0.

7. Software disables the refresh counter by setting the RFR to zero.
8. Software issues one NOP cycle after the 200 us device deselect. A NOP is
accomplished by setting the SDIR to 00112. The MCU asserts DDRI_CKE[1:0] with
the NOP.
9. Software issues a precharge-all command to the DDRI SDRAM interface by setting
the SDIR to 00102.
10. Software issues an extended-mode-register-set command to enable the DLL by
writing 01002 to the SDIR. The MCU supports the following DDRI SDRAM mode
parameters:
11. After waiting Tmrd cycles, software issues a mode-register-set command by writing
00012 to the SDIR to program the DDRI SDRAM parameters and to reset the DLL.
The MCU supports the following DDRI SDRAM mode parameters:
12. After waiting Tmrd cycles, software issues a precharge-all command to the DDRI
SDRAM interface by setting the SDIR to 00102.
13. After waiting Trp cycles, software provides two auto-refresh cycles. An auto-refresh
cycle is accomplished by setting the SDIR to 01102. Software must ensure at least
Trfc cycles between each auto-refresh command.
14. Following the second auto-refresh cycle, software must wait Trfc cycles. Then,
software issues a mode-register-set command by writing to the SDIR to program the
DDRI SDRAM parameters without resetting the DLL by writing 00002 to the SDIR.
15. The MCU may issue a row-activate command Tmrd cycles after the mode-register-set
command.
16. Software re-enables the refresh counter by setting the RFR to the required value.
The waveform in Figure 109 illustrates the DDRI SDRAM initialization sequence.


2009-05-18 



    郭  劲
13810607876
010-62771694
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