FSL driver for powerpc linux2.6 (xilinx ML403)

Guangye Tian guangye.tian at gmail.com
Thu Mar 26 03:01:31 EST 2009


Hello,

I am working with the xilinx ML403 evaluation board which has a
Virtex4 FPGA and one powerpc405 processor is integrated.

I am trying to develop a linux driver for FSL link for powerpc405. I
developed one first version (with the referce of the microblaze fsl
driver developped by Mr. John Williams for uClinux) as a loadable
module, and loaded it after Linux is booted. But when I run some
testing function like "cat /dev/fslfifo", it crashes the kernel.

I suppose that it is because FSL operations (like nget, nput, etc. )
are not part of the ppc instruction set and are realized by APU
instruction extension. For the processor to execute the extended
instructions correctly, the MSR register should be set accordingly to
enable APU. (XREG_MSR_APU_AVAILABLE + XREG_MSR_APU_ENABLE). Before I
worked with ppc without os, and the management of special purpose
registers are rather straight forward and it concerns only some
assembly language at the beginning of the main() function. But with
os, I have no experience dealing explicitely with special purpose
registers. So I tried the following:

I set the MSR at the initialisation phase by

mtmsr(XREG_MSR_APU_AVAILABLE | XREG_MSR_APU_ENABLE | mfmsr())

However, when I set the MSR at the initialization function, and test
afterwards, the MSR value is set back to some default value. I don't
know where it happened neighter do I know if I am using the correct
measure to change the MSR value.

Does anybody have any suggestions?

Thank you,

Guangye



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