[MPC8272ADS]Can not configure the ttyCPM0

[Laurent Pinchart]

Hi Jean-Michel,

On Friday 13 March 2009 15:20:24 Jean-Michel Hautbois wrote:
> 2009/3/13 Laurent Pinchart <laurentp at cse-semaphore.com>:
> > Support for the modem control lines has been added in v2.6.27-rc2. You
> > will need to declare the modem control lines in your device tree. See
> > Documentation/powerpc/dts-bindings/fsl/cpm_qe/serial.txt for more
> > information.
> >
> > Please note that hardware flow control is not supported by the CPM UART
> > driver yet.
>
> OK, this is not easy, to modify...
> My DTS already contains a configuration for the CPM1 port...
>
> 			serial at 11a00 {
> 				device_type = "serial";
> 				compatible = "fsl,mpc8272-scc-uart",
> 				             "fsl,cpm2-scc-uart";
> 				reg = <0x11a00 0x20 0x8000 0x100>;
> 				interrupts = <40 8>;
> 				interrupt-parent = <&PIC>;
> 				fsl,cpm-brg = <1>;
> 				fsl,cpm-command = <0x800000>;
> 			};
>
> 			serial at 11a60 {
> 				device_type = "serial";
> 				compatible = "fsl,mpc8272-scc-uart",
> 				             "fsl,cpm2-scc-uart";
> 				reg = <0x11a60 0x20 0x8300 0x100>;
> 				interrupts = <43 8>;
> 				interrupt-parent = <&PIC>;
> 				fsl,cpm-brg = <4>;
> 				fsl,cpm-command = <0xce0000>;
> 			};
>
> I can't see what I have to do...
> This is not obvious ;).

Here are excerpts of my device tree for an MPC8248 based platform.

You need to declare GPIO controllers for the pins used by modem control lines

        cpm2_pio_c: gpio_controller at 10d40 {
                compatible = "fsl,mpc8248-pario-bank",
                             "fsl,cpm2-pario-bank";
                reg = <0x10d40 0x14>;
                #gpio-cells = <2>;
                gpio-controller;
        };

        cpm2_pio_d: gpio_controller at 10d60 {
                compatible = "fsl,mpc8248-pario-bank",
                             "fsl,cpm2-pario-bank";
                reg = <0x10d60 0x14>;
                #gpio-cells = <2>;
                gpio-controller;
        };

and add the GPIO mapping in your serial port controller nodes

        gpios = <&cpm2_pio_c 15 0       /* CTS */
                 &cpm2_pio_d 29 0       /* RTS */
                 &cpm2_pio_c 14 0       /* DCD */
                 0                      /* DSR */
                 &cpm2_pio_d 20 0       /* DTR */
                 &cpm2_pio_c 8 0        /* RI */
                >;

Don't forget to configure the pins (direction, special purpose, ...) in your 
board-specific code.

-- 
Laurent Pinchart
CSE Semaphore Belgium

Waterloo Office Park
Building M
Dreve Richelle, 161
B-1410 Waterloo
Belgium

T +32 (2) 387 42 59
F +32 (2) 387 42 75
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