Inline Assembly queries

kernel mailz kernelmailz at googlemail.com
Tue Jun 30 01:49:57 EST 2009


I tried a small example

int *p = 0x1000;
int a = *p;
asm("sync":::"memory");
a = *p;

and

volatile int *p = 0x1000;
int a = *p;
asm("sync");
a = *p

Got the same assembly.
Which is right.

So does it mean, if proper use of volatile is done, there is no need
of "memory" ?
But then why  below example of __xchg uses both ?

I am confused!
Anyone has a clue?

-TZ


---------- Forwarded message ----------
From: kernel mailz <kernelmailz at googlemail.com>
Date: Sun, Jun 28, 2009 at 10:27 AM
Subject: Re: Inline Assembly queries
To: Ian Lance Taylor <iant at google.com>
Cc: gcc-help at gcc.gnu.org, linuxppc-dev at ozlabs.org


Thanks Ian,
For the "memory" clobber
I tried with the a function in linux kernel

--
/*
 * Atomic exchange
 *
 * Changes the memory location '*ptr' to be val and returns
 * the previous value stored there.
 */
static inline unsigned long
__xchg_u32(volatile void *p, unsigned long val)
{
       unsigned long prev;

       __asm__ __volatile__(

"1:     lwarx   %0,0,%2 \n"

"       stwcx.  %3,0,%2 \n\
       bne-    1b"

       : "=&r" (prev), "+m" (*(volatile unsigned int *)p)
       : "r" (p), "r" (val)
//        :"memory","cc");

       return prev;
}
#define ADDR 0x1000
int main()
{
       __xchg_u32((void*)ADDR, 0x2000);
       __xchg_u32((void*)ADDR, 0x3000);

       return 0;

}

Got the same asm, when compiled with O1 , with / without "memory" clobber

100003fc <main>:
100003fc:       39 20 10 00     li      r9,4096
10000400:       38 00 20 00     li      r0,8192
10000404:       7d 60 48 28     lwarx   r11,0,r9
10000408:       7c 00 49 2d     stwcx.  r0,0,r9
1000040c:       40 a2 ff f8     bne-    10000404 <main+0x8>
10000410:       38 00 30 00     li      r0,12288
10000414:       7d 60 48 28     lwarx   r11,0,r9
10000418:       7c 00 49 2d     stwcx.  r0,0,r9
1000041c:       40 a2 ff f8     bne-    10000414 <main+0x18>
10000420:       38 60 00 00     li      r3,0
10000424:       4e 80 00 20     blr

No diff ?
am I choosing the right example ?

-TZ


On Sun, Jun 28, 2009 at 4:50 AM, Ian Lance Taylor<iant at google.com> wrote:
> kernel mailz <kernelmailz at googlemail.com> writes:
>
>> I've been fiddling my luck with gcc 4.3.2 inline assembly on powerpc
>> There are a few queries
>>
>> 1. asm volatile or simply asm produce the same assembly code.
>> Tried with a few examples but didnt find any difference by adding
>> volatile with asm
>>
>> 2. Use of "memory" and clobbered registers.
>>
>> "memory" -
>> a. announce to the compiler that the memory has been modified
>> b. this instruction writes to some memory (other than a listed output)
>> and GCC shouldn’t cache memory values in registers across this asm.
>>
>> I tried with stw and stwcx instruction, adding "memory" has no effect.
>>
>> Is there any example scenerio where gcc would generate different
>> assembly by adding / removing "memory" ?
>
> Please never send a message to both gcc at gcc.gnu.org and
> gcc-help at gcc.gnu.org.  This message is appropriate for
> gcc-help at gcc.gnu.org, not for gcc at gcc.gnu.org.  Thanks.
>
> An asm with no outputs is always considered to be volatile.  To see the
> affect of volatile, just try something like
>    asm ("# modify %0" : "=r" (i) : /* no inputs */ : /* no clobbers */);
> Try it with and without optimization.
>
> As the documentation says, the effect of adding a "memory" clobber is
> that gcc does not cache values in registers across the asm.  So the
> effect will be shown in something like
>  int i = *p;
>  asm volatile ("# read %0" : : "r" (i));
>  return *p;
> The memory clobber will only make a different when optimizing.
>
> Ian
>


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