MPC83xx watchdog reset board dead lock

[Norbert van Bolhuis]

Hi Leon,

I doubt if there are working designs for this.

In u-boot the watchdog (if enabled with CONFIG_WATCHDOG) is normally
strobed in the decrementer interrupt routine (timer_interrupt). So
I guess there's not a big chance it triggers a reset.

It is possible to configure the WD to issue a machine check interrupt
(i.s.o. HRESET). Maybe it's possible (or even done already) to put the
flash into READ-mode from the isr ?

---
N. van Bolhuis.



Leon Woestenberg wrote:
> Hello,
> 
> this is a hardware, even board issue, but I hope to find the right
> target audience here.
> 
> 
> In our MPC83xx design I would like to prevent dead lock in case where
> a field upgrade is performed, i.e. NOR Flash is erased or written, and
> the MPC83xx built-in hardware watchdog triggers.
> 
> In u-boot the scenario can be easily reproduced by running this
> command (WARNING, erases some sectors!) on an MPC8313E-RDB:
> 
> erase_wdg=mw.l 0xe0000204 0x10000007 1;mw.w 0xe000020e 0x556c 1;mw.w
> 0xe000020e 0xaa39 1;erase 1:10-30
> 
> This sets up the watchdog to reset soonish, then starts erasing NOR
> sectors. Watchdog triggers and resets -> Dead lock.
> 
> 
> Most MPC8xxx board designs I have seen suffer from this possible dead lock:
> - NOR Flash is put in erase mode or write mode
> - Hardware watchdog triggers
> - HRESET# is asserted by the processor, during which the configuration
> words are read from NOR Flash.
> 
> Either
> HRESET# is not attached to NOR, NOR stays in erase/write mode and
> invalid words will be read -> dead lock
> 
> or either:
> HRESET# is attached to NOR reset, NOR is reset, but stays in reset as
> HRESET# stays asserted.
> 
> 
> 
> We have been looking at several solutions hardware wise that reset the
> NOR flash on HRESET# going low, but the processors are stubborn,
> read the config words only once, than dead lock.
> 
> I wonder if there are known-working designs for this.
> 
> Regards,