[PATCH -next] powerpc/fsl-booke: Enable L1 cache on e500v1/e500v2/e500mc CPUs

[Kumar Gala]

On Jun 10, 2009, at 3:37 PM, Nate Case wrote:

> Some boot loaders may not enable L1 instruction/data cache.  Check if
> data and instruction caches are enabled, and enable them if needed.
>
> Signed-off-by: Nate Case <ncase at xes-inc.com>
> ---
> arch/powerpc/include/asm/reg_booke.h      |    2 +
> arch/powerpc/kernel/cpu_setup_fsl_booke.S |   49 ++++++++++++++++++++ 
> +++++++--
> 2 files changed, 48 insertions(+), 3 deletions(-)

applied to next

- k