[PATCH] mpc83xx/usb.c: fix usb mux setup for mpc834x

[Peter Korsgaard]

>>>>> "Kumar" == Kumar Gala <galak at kernel.crashing.org> writes:

Hi,

 Kumar> On Jun 9, 2009, at 6:43 AM, Peter Korsgaard wrote:

 >> usb0 and usb1 mux settings in the sicrl register were swapped (twice!)
 >> in mpc834x_usb_cfg(), leading to various strange issues with fsl-ehci
 >> and full speed devices.
 >> 
 >> The USB port config on mpc834x is done using 2 muxes: Port 0 is
 >> always used for MPH port 0, and port 1 can either be used for MPH
 >> port 1 or DR (unless DR uses TMDI phy or OTG, then it uses both
 >> ports) - See 8349 RM figure 1-4..
 >> 
 >> mpc8349_usb_cfg() had this inverted for the DR, and it also had
 >> the bit positions of the usb0 / usb1 mux settings swapped. It
 >> would basically work if you specified port1 instead of port0 for
 >> the MPH controller (and happened to use ULPI phys), which is what
 >> all the 834x dts have done, even though that configuration is
 >> physically invalid.
 >> 
 >> Instead fix mpc8349_usb_cfg() and adjust the dts files to match
 >> reality.
 >> 
 >> Signed-off-by: Peter Korsgaard <jacmet at sunsite.dk>

 Kumar> applied.. Please remind me to send this linux-stable for .30 and .29

*Remind*

-- 
Bye, Peter Korsgaard