AW: Direct MII connection between MPC8313 and VIRTEX FPGA

[Frank Prepelica]

Hi Grant

Thank you very much so far. It helped me a lot!

Best regards
Frank

 
 
 
	
> -----Ursprüngliche Nachricht-----
> Von: linuxppc-dev-bounces+frank.prepelica=ubidyne.com at lists.ozlabs.org
> [mailto:linuxppc-dev-bounces+frank.prepelica=ubidyne.com at lists.ozlabs.org]
> Im Auftrag von Grant Likely
> Gesendet: Dienstag, 30. Juni 2009 18:17
> An: Frank Prepelica
> Cc: linuxppc-dev at ozlabs.org
> Betreff: Re: Direct MII connection between MPC8313 and VIRTEX FPGA
> 
> On Tue, Jun 30, 2009 at 2:35 AM, Frank
> Prepelica<Frank.Prepelica at ubidyne.com> wrote:
> >> What kernel version are you using?
> >
> > We are using kernel version 2.6.24. I've searched for "current speed" in
> version 2.6.28.7 and I've found that string.
> >
> >> Yes, you need to modify the DTB.  You have a back to back MII
> >> connection, not a phy, so you do *not* want to have a PHY node in the
> >> device tree.
> >
> > Hmm, but I do have a "PHY", don't I?. The "PHY" will be emulated in the
> FPGA. Of course, it's not a physical PHY but it should look like one.
> 
> No, it sounds like you don't.  If you've got a back-to-back MII
> connection, then you can fix the link speed and you don't need to do
> any form of PHY emulation.  ie. you don't need to wire up the MDIO
> pins.
> 
> > So, do I really need the remove the complete PHY description in the DTB?
> 
> yes.
> 
> --
> Grant Likely, B.Sc., P.Eng.
> Secret Lab Technologies Ltd.
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