Non-contiguous physical memory

[Aaron Pace]

>
> Its possible in that Linux supports this.  However the PPC32 code does not
> exist and would need to be added to support non-contiguous memory ranges.
>
> What exact PCI-E needs do you have?  Is PCI-E performance critical?  Is
> (are) your pci device(s) 64-bit address capable?
>
> I ask because depending on the answers doing straight 4G and PCI above that
> range might be sufficient for your needs.
>
> - k
>

Hello, thanks for responding.
The first take at this used your idea of mapping the PCI-E ranges
above the 4G boundary.
We have a localbus bridge device on the PCI-E bus that only supports
32-bit MMIO, but I believe we could satisfactorily work around that
problem using the ATMU registers.
However, one question that I had that I wasn't able to verify to my
satisfaction was whether I could ioremap a 36-bit physical address
when building for ppc32, as the PCI-E devices have memory ranges that
need to be accessible from userspace.  If that is possible, then this
may be the way to go, although it would still be nice not to lose the
128 meg for the localbus & CCSR region.

Thanks,
-Aaron