MPC5200 PCI Issues
Tobias Knutsson
tobias.knutsson at gmail.com
Sat Feb 7 07:38:28 EST 2009
Hi Andre,
I started the development with 2.6.28. Thanks for all of your
suggestions but I managed to find the solution today. The problem was
that the PCI-cards did not have class specified. Adding a fixup hook
to the cards in quirks.c resolved the issue.
On Fri, Feb 6, 2009 at 14:34, Andre Schwarz
<andre.schwarz at matrix-vision.de> wrote:
> Tobias,
>
> are you starting with 2.6.28 or are you upgrading ?
> My system runs very fine with 2.6.27 ....
>
> Tobias Knutsson wrote:
>>
>> I am currently trying to get an MPC5200-based board to run Linux
>> 2.6.28. Most of the devices are working, however i have some issues
>> with the PCI-bus. More precisely, the issue is that all of
>> the cards' IO-regions are mapped to address 0x0.
>> In my device tree I have the following:
>>
>> pci at f0000d00 {
>> #interrupt-cells = <1>;
>> #size-cells = <2>;
>> #address-cells = <3>;
>> device_type = "pci";
>> compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci";
>> reg = <0xf0000d00 0x100>;
>> interrupt-map-mask = <0xf800 0 0 7>;
>> interrupt-map = <0xb000 0 0 1 &mpc5200_pic 0 0 3 // MPC5200
>> 0xb000 0 0 2 &mpc5200_pic 0 0 3
>> 0xb000 0 0 3 &mpc5200_pic 0 0 3
>> 0xb000 0 0 4 &mpc5200_pic 0 0 3
>>
>
> What's this ? Is the MPC5200 interrupting itself ?
No, the PCI-bridge is connected to IRQ0
>>
>> 0xb800 0 0 1 &mpc5200_pic 1 1 3 // c64x0
>> 0xb800 0 0 2 &mpc5200_pic 1 1 3
>> 0xb800 0 0 3 &mpc5200_pic 1 1 3
>> 0xb800 0 0 4 &mpc5200_pic 1 1 3
>>
>
> Have you connected 4 IRQ lines to each c64x device ?
No, this is just some copy-paste leftovers that should be trimmed down
after some examination of the schematics.
>>
>> 0xc000 0 0 1 &mpc5200_pic 1 1 3 // c64x1
>> 0xc000 0 0 2 &mpc5200_pic 1 1 3
>> 0xc000 0 0 3 &mpc5200_pic 1 1 3
>> 0xc000 0 0 4 &mpc5200_pic 1 1 3
>>
>> 0xc800 0 0 1 &mpc5200_pic 1 1 3 // c64x2
>> 0xc800 0 0 2 &mpc5200_pic 1 1 3
>> 0xc800 0 0 3 &mpc5200_pic 1 1 3
>> 0xc800 0 0 4 &mpc5200_pic 1 1 3
>>
>> 0xd000 0 0 1 &mpc5200_pic 1 1 3 // c64x3
>> 0xd000 0 0 2 &mpc5200_pic 1 1 3
>> 0xd000 0 0 3 &mpc5200_pic 1 1 3
>> 0xd000 0 0 4 &mpc5200_pic 1 1 3
>>
>> 0xd800 0 0 1 &mpc5200_pic 1 1 3 // c64x4
>> 0xd800 0 0 2 &mpc5200_pic 1 1 3
>> 0xd800 0 0 3 &mpc5200_pic 1 1 3
>> 0xd800 0 0 4 &mpc5200_pic 1 1 3>;
>>
>>
>
> I'm using an external FPGA and an e1000 NIC connectedt to IRQ2 and IRQ3 :
>
> interrupt-map = <0x5800 0 0 1 &mpc5200_pic 1 2 3
> 0x5000 0 0 1 &mpc5200_pic 1 3
> 3>;
>
>
>> clock-frequency = <0x1e84800>; //<0>; // From boot loader
>> interrupts = <2 8 0 2 9 0 2 10 0>;
>> interrupt-parent = <&mpc5200_pic>;
>> bus-range = <0 0>;
>> ranges = <0x02000000 0 0x50000000 0x50000000 0 0x10000000
>> 0x01000000 0 0x00000000 0x60000000 0 0x01000000>;
>> };
>>
>
> I'm using a 3 liner :
>
> ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000
> 0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
> 0x01000000 0 0x00000000 0xb0000000 0 0x01000000>;
>
>> The cards' memory regions are mapped out fine to different addresses
>> in the 0x50000000-0x60000000 range. However, the IO regions are all mapped
>> to zero.
>>
>>
>
> Are you c64x devices responding properly ? Is IO access enabled in the PCI
> command register ?
> Are they announcing a reasonable window ? How man KBytes ?
>>
>> Do you have any idea on what could be wrong or in which direction I
>> should be looking?
>>
>>
>>
>
> Hopefully something is useful to you.
>
> regards,
> Andre
>
>
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--
Hälsningar/Regards
Tobias Knutsson
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