[PATCH] powerpc/44x: Fix address decoding setup of PCI 2.x cells

[Josh Boyer]

On Mon, Feb 02, 2009 at 11:24:18AM +1100, Benjamin Herrenschmidt wrote:
>The PCI 2.x cells used on some 44x SoCs only let us configure the decode
>for the low 32-bit of the incoming PLB addresses. The top 4 bits (this
>is a 36-bit bus) are hard wired to different values depending on the
>specific SoC in use. Our code used to work "by accident" until I added
>support for the ISA memory holes and while at it added more validity
>checking of the addresses.
>
>This patch should bring it back to working condition. It still relies
>on the device-tree being correct but that's somewhat a pre-requisite
>for anything to work anyway.
>
>Signed-off-by: Benjamin Herrenschmidt <benh at kernel.crashing.org>
>---
>
>This is untested. Geert, can you give it a go on Sequoia and let me
>know if it fixes your problem ?

Since Geert tested it somewhat successfully, perhaps we should get
this one into 2.6.29.  I have no other fixes outstanding, so feel
free to pull it in yourself.

Acked-by: Josh Boyer <jwboyer at linux.vnet.ibm.com>

josh