[Patch 1/1] PPC64-HWBKPT: Implement hw-breakpoints for PPC64

Roland McGrath roland at redhat.com
Mon Dec 14 11:56:48 EST 2009

I can't see anything you've done to keep this use of MSR_SE in the
user-mode register state from interfering with user_enable_single_step().
It looks to me like you'd swallow the normal step indications.

Likewise I'm not very clear on the interaction with kprobes, kgdb,
or whatnot for kernel-mode cases.  But I'll leave those concerns to
others, since I know more about the user-mode situations.

Back to the user-mode case, is it really reasonable to disable
preemption in hw_breakpoint_handler and leave it so across returning
to user mode?  (Is that even possible?  I thought user mode was
always preemptible.)  That is done very casually with little comment
in hw_breakpoint_handler and single_step_dabr_instruction, but it
seems like an extremely deep and magical thing that merits more
explanation.  I guess the need for it has to do with the per_cpu
variable you're using, but the whole situation is not very clear on
first reading.  Even for kernel mode, what does this mean when the
stepped instruction does a page fault?


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