[PATCH 1/5] powerpc/mm: Add MMU features for TLB reservation & Paired MAS registers

Benjamin Herrenschmidt benh at kernel.crashing.org
Thu Aug 20 10:43:48 EST 2009

On Wed, 2009-08-19 at 16:37 -0500, Kumar Gala wrote:
> On Aug 19, 2009, at 2:25 AM, Benjamin Herrenschmidt wrote:

> The whole thing only ever gets called if we had tlbsrx. so is there  
> any utility in making a part of conditional on tlbsrx?

I don't think so ... this is the second level TLB miss handler when
the first level takes a hit on the virtually linear page tables, I
has nothing to do with tlbsrx... however, it does offset the return
address back into the first level handler by -4 to account for
replaying the tlbsrx instruction which you probably don't want to do.


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