Question about DBCR0 initialization for 440

John Linn John.Linn at xilinx.com
Sat Apr 18 06:41:26 EST 2009


 

> -----Original Message-----
> From: Josh Boyer [mailto:jwboyer at linux.vnet.ibm.com] 
> Sent: Friday, April 17, 2009 2:36 PM
> To: John Linn
> Cc: grant.likely at secretlab.ca; Benjamin Herrenschmidt; 
> linuxppc-dev at ozlabs.org; Hollis Blanchard; Tirumala Reddy Marri
> Subject: Re: Question about DBCR0 initialization for 440
> 
> On Fri, Apr 17, 2009 at 02:30:45PM -0600, John Linn wrote:
> >> > Might be worth checking if external debug is enabled, and 
> >> override it
> >> > only if it's not.
> >> 
> >> ppc440x5_um.pdf says that both can be enabled.
> >> 
> >
> >The code that I started the thread with, from the fsl file, 
> has conditional for the BDI around it.
> >
> >We think that we still need that conditional as the code is 
> not Oring in the enable such that it would
> >disable external debug mode for the BDI. But we need it this 
> way for our Xilinx pod.
> 
> EDM is a read-only bit according to the docs I have.  You 
> can't set it (or
> clear it) at all.  It's only set by external hardware.

That's strange, my 440x4_um.pdf does not say it's read-only unless it's
in some obscure place.

> 
> josh
> 
> 

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