Regarding Level/Edge of Interrupt sense values

Scott Wood scottwood at freescale.com
Sat Apr 11 04:52:13 EST 2009


On Mon, Feb 23, 2009 at 05:27:53PM +0530, Vijay Nikam wrote:
> Hello,

Sorry for the late reply; I just noticed this sitting in my inbox.

> I created a device node for gpio-controller for evaluation board
> mpc83313erdb. I created the dtb and loaded on target and the interrupt
> is generated successfully.
> 
> But in dts at interrupts = <74 0x2> I set sense as Edge (sense== 2:
> Edge, high-to-low change),  when I load the driver module and checked
> the entry in /proc/interrupts it shows the sense as Level i.e. 8
> (sense == 8: Level, low assertion) as follows;
> 
> 74:          1   IPIC   Level     gpio

Internal interrupts are inherently level-triggered.  The sense/trigger of
the gpio interrupt itself (as configured in the IPIC) has nothing to do
with the sense/trigger of the gpio *pin* (as configured in the GPIO
block).

-Scott



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