linux-next: manual merge of the tip-core tree

Stephen Rothwell sfr at canb.auug.org.au
Tue Oct 14 15:23:58 EST 2008


Hi all,

Today's linux-next merge of the tip-core tree got a conflict in
arch/powerpc/platforms/Kconfig.cputype between commit
4ee7084eb11e00eb02dc8435fd18273a61ffa9bf ("Allow 32-bit hashed pgtable
code to support 36-bit physical") from the powerpc tree and commit
8308c54d7e312f7a03e2ce2057d0837e6fe3843f ("redefine resource_size_t as
phys_addr_t") from the tip-core tree.

Just context.  I fixed it up (see below) and can carry the fix (assuming
it is correct).
-- 
Cheers,
Stephen Rothwell                    sfr at canb.auug.org.au
http://www.canb.auug.org.au/~sfr/

diff --cc arch/powerpc/platforms/Kconfig.cputype
index 439c5ba,be852fd..0000000
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@@ -129,20 -128,17 +129,19 @@@ config FSL_EMB_PERFMO
  
  config PTE_64BIT
  	bool
 -	depends on 44x || E500
 -	default y if 44x
 -	default y if E500 && PHYS_64BIT
 +	depends on 44x || E500 || PPC_86xx
 +	default y if PHYS_64BIT
  
  config PHYS_64BIT
 -	bool 'Large physical address support' if E500
 -	depends on 44x || E500
 -	default y if 44x
 +	bool 'Large physical address support' if E500 || PPC_86xx
 +	depends on (44x || E500 || PPC_86xx) && !PPC_83xx && !PPC_82xx
- 	select RESOURCES_64BIT
  	---help---
  	  This option enables kernel support for larger than 32-bit physical
 -	  addresses.  This features is not be available on all e500 cores.
 +	  addresses.  This feature may not be available on all cores.
 +
 +	  If you have more than 3.5GB of RAM or so, you also need to enable
 +	  SWIOTLB under Kernel Options for this to work.  The actual number
 +	  is platform-dependent.
  
  	  If in doubt, say N here.
  
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