i2c-mpc clocking scheme

[Trent Piepho]

On Thu, 27 Nov 2008, Andre Schwarz wrote:
> Timur Tabi schrieb:
>> On Thu, Nov 27, 2008 at 9:00 AM, Andre Schwarz
>> <andre.schwarz at matrix-vision.de> wrote:
>>
>>> All,
>>>
>>> is anybody working on some improvements regarding configurable I2C
>>> frequency inside the i2c-mpc driver ?
>>>
>>> If not - would anybody be intersted in getting this done, i.e.
>>> configurable via device tree ?
>>>
>>
>> Maybe I'm missing something, but U-Boot configures the I2C bus speed.
>> It does this because the algorithm is specific to the SOC itself.  For
>> example, the 8544 is different from the 8548.  It would be a mess to
>> duplicate this code in the kernel.
>>
>>
> You're right regarding U-Boot, but the i2c-mpc driver overwrites the
> "frequency divider register" on all chips.
>
> I'm not happy with a fixed 0x3f @ MPC5200 which results in 65kHz ... :-(
>
> Have a look at line 163 in drivers/i2c/busses/i2c-mpc.c

Seems like it should keep the clock registers at what u-boot set them too.