Rebooting the mpc8544

Kumar Gala galak at kernel.crashing.org
Thu Nov 6 00:55:02 EST 2008


On Nov 5, 2008, at 6:37 AM, Sebastian Andrzej Siewior wrote:

> I'm trying to reboot the mpc8544 and pass the reason of the reboot  
> (two
> bits would be enough). I've been told the a PowerPC cpu has usually a
> few registers which will survive a soft reset.
> The "normal" reboot is done via the HRESET_REQ line which is handeled
> by externel HW and does a power cycle.
> The e500 watchdog also uses the HRESET_REQ line.
> Other way would be use the Debug Control Register 0 (DBCR0) and set  
> the
> reset bit. The manual says here that it does a hard reset so none of
> my registers will survive, right? There is a Most recent reset (MRR)  
> bit
> in the Debug Status Register (DBSR) but that one should be always set
> since the last reset was a hard reset.
> Right now I'm thinking about stealing a page and put the information
> there since the memory controller isn't re-initialized.
> Does someone have a better idea?

The issue w/DBCR0 is it only resets the core and not the reset of the  
SoC.  So you can still have IO transactions in flight, etc.. you have  
to ensure you quiesce all these things to handle it properly.

- k



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