QE in MPC8360MDS

[mike zheng]

Anton. Thanks for the info you provide.

The code I have actually works fine on MPC8568. It does NOT work on MPC8360.

The value of following register are correct based on the manual. And
the RxBD flag changed as well. I shall see the bit of UCCE changes,
Right? Do I miss provision anything? Is there any other register shall
I check in order to get the interrupt bit in UCCE?

gumr  : addr - 0xfdf02000, val - 0x4000000c
ucce  : addr - 0xfdf02010, val - 0x00000000
uccm  : addr - 0xfdf02014, val - 0x7f010001

On Fri, Oct 31, 2008 at 10:01 AM, Anton Vorontsov
<avorontsov at ru.mvista.com> wrote:
> On Fri, Oct 31, 2008 at 09:47:18AM -0400, mike zheng wrote:
>> Hi All,
>>
>> Anyone know the difference of QE between MPC8360 and MPC8568?
>>
>> I am using the QE code working for MPC8568 on a MPC8360MDS board.
>> However there is no interrupt generated by UCC0. I set the QE working
>> under loopback mode. The flag of TxBD got changed, but the UCCE
>> remains the same value. Here is the logs and register value.
>
> I recalling these differences:
>
> QEIC to MPIC vs. IPIC cascading (may be the cause of interrupts
> issues).
> http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commitdiff;h=cccd21027c17c27ad275093c22475354b4495814
>
> QE ParIO layout (you may have pins misconfigured):
> http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commitdiff;h=321872dcc07f83f9b60af1be41c6bafbaddf9bf6
>
> --
> Anton Vorontsov
> email: cbouatmailru at gmail.com
> irc://irc.freenode.net/bd2
>