[PATCH] [POWERPC] 85xx: Add next-level-cache property
Kumar Gala
galak at kernel.crashing.org
Sat May 31 06:43:19 EST 2008
Added next-level-cache to the L1 and a reference to the new L2 label.
---
In my powerpc-next branch.
arch/powerpc/boot/dts/ksi8560.dts | 3 ++-
arch/powerpc/boot/dts/mpc8540ads.dts | 3 ++-
arch/powerpc/boot/dts/mpc8541cds.dts | 3 ++-
arch/powerpc/boot/dts/mpc8544ds.dts | 3 ++-
arch/powerpc/boot/dts/mpc8548cds.dts | 3 ++-
arch/powerpc/boot/dts/mpc8555cds.dts | 3 ++-
arch/powerpc/boot/dts/mpc8560ads.dts | 2 +-
arch/powerpc/boot/dts/mpc8568mds.dts | 3 ++-
arch/powerpc/boot/dts/mpc8572ds.dts | 4 +++-
arch/powerpc/boot/dts/sbc8548.dts | 3 ++-
arch/powerpc/boot/dts/sbc8560.dts | 3 ++-
arch/powerpc/boot/dts/stx_gp3_8560.dts | 3 ++-
arch/powerpc/boot/dts/tqm8540.dts | 3 ++-
arch/powerpc/boot/dts/tqm8541.dts | 3 ++-
arch/powerpc/boot/dts/tqm8555.dts | 3 ++-
arch/powerpc/boot/dts/tqm8560.dts | 3 ++-
16 files changed, 32 insertions(+), 16 deletions(-)
diff --git a/arch/powerpc/boot/dts/ksi8560.dts b/arch/powerpc/boot/dts/ksi8560.dts
index f869ce3..6eb7c77 100644
--- a/arch/powerpc/boot/dts/ksi8560.dts
+++ b/arch/powerpc/boot/dts/ksi8560.dts
@@ -40,6 +40,7 @@
timebase-frequency = <0>; /* From U-boot */
bus-frequency = <0>; /* From U-boot */
clock-frequency = <0>; /* From U-boot */
+ next-level-cache = <&L2>;
};
};
@@ -62,7 +63,7 @@
interrupts = <0x12 0x2>;
};
- l2-cache-controller at 20000 {
+ L2: l2-cache-controller at 20000 {
compatible = "fsl,8540-l2-cache-controller";
reg = <0x20000 0x1000>;
cache-line-size = <0x20>; /* 32 bytes */
diff --git a/arch/powerpc/boot/dts/mpc8540ads.dts b/arch/powerpc/boot/dts/mpc8540ads.dts
index 58e165e..79881a1 100644
--- a/arch/powerpc/boot/dts/mpc8540ads.dts
+++ b/arch/powerpc/boot/dts/mpc8540ads.dts
@@ -40,6 +40,7 @@
timebase-frequency = <0>; // 33 MHz, from uboot
bus-frequency = <0>; // 166 MHz
clock-frequency = <0>; // 825 MHz, from uboot
+ next-level-cache = <&L2>;
};
};
@@ -63,7 +64,7 @@
interrupts = <18 2>;
};
- l2-cache-controller at 20000 {
+ L2: l2-cache-controller at 20000 {
compatible = "fsl,8540-l2-cache-controller";
reg = <0x20000 0x1000>;
cache-line-size = <32>; // 32 bytes
diff --git a/arch/powerpc/boot/dts/mpc8541cds.dts b/arch/powerpc/boot/dts/mpc8541cds.dts
index 21ebe7c..66192aa 100644
--- a/arch/powerpc/boot/dts/mpc8541cds.dts
+++ b/arch/powerpc/boot/dts/mpc8541cds.dts
@@ -40,6 +40,7 @@
timebase-frequency = <0>; // 33 MHz, from uboot
bus-frequency = <0>; // 166 MHz
clock-frequency = <0>; // 825 MHz, from uboot
+ next-level-cache = <&L2>;
};
};
@@ -63,7 +64,7 @@
interrupts = <18 2>;
};
- l2-cache-controller at 20000 {
+ L2: l2-cache-controller at 20000 {
compatible = "fsl,8541-l2-cache-controller";
reg = <0x20000 0x1000>;
cache-line-size = <32>; // 32 bytes
diff --git a/arch/powerpc/boot/dts/mpc8544ds.dts b/arch/powerpc/boot/dts/mpc8544ds.dts
index 921f9f6..6cf533f 100644
--- a/arch/powerpc/boot/dts/mpc8544ds.dts
+++ b/arch/powerpc/boot/dts/mpc8544ds.dts
@@ -41,6 +41,7 @@
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
+ next-level-cache = <&L2>;
};
};
@@ -65,7 +66,7 @@
interrupts = <18 2>;
};
- l2-cache-controller at 20000 {
+ L2: l2-cache-controller at 20000 {
compatible = "fsl,8544-l2-cache-controller";
reg = <0x20000 0x1000>;
cache-line-size = <32>; // 32 bytes
diff --git a/arch/powerpc/boot/dts/mpc8548cds.dts b/arch/powerpc/boot/dts/mpc8548cds.dts
index 213c88e..205598d 100644
--- a/arch/powerpc/boot/dts/mpc8548cds.dts
+++ b/arch/powerpc/boot/dts/mpc8548cds.dts
@@ -45,6 +45,7 @@
timebase-frequency = <0>; // 33 MHz, from uboot
bus-frequency = <0>; // 166 MHz
clock-frequency = <0>; // 825 MHz, from uboot
+ next-level-cache = <&L2>;
};
};
@@ -68,7 +69,7 @@
interrupts = <18 2>;
};
- l2-cache-controller at 20000 {
+ L2: l2-cache-controller at 20000 {
compatible = "fsl,8548-l2-cache-controller";
reg = <0x20000 0x1000>;
cache-line-size = <32>; // 32 bytes
diff --git a/arch/powerpc/boot/dts/mpc8555cds.dts b/arch/powerpc/boot/dts/mpc8555cds.dts
index 400f6db..7c9d0b1 100644
--- a/arch/powerpc/boot/dts/mpc8555cds.dts
+++ b/arch/powerpc/boot/dts/mpc8555cds.dts
@@ -40,6 +40,7 @@
timebase-frequency = <0>; // 33 MHz, from uboot
bus-frequency = <0>; // 166 MHz
clock-frequency = <0>; // 825 MHz, from uboot
+ next-level-cache = <&L2>;
};
};
@@ -63,7 +64,7 @@
interrupts = <18 2>;
};
- l2-cache-controller at 20000 {
+ L2: l2-cache-controller at 20000 {
compatible = "fsl,8555-l2-cache-controller";
reg = <0x20000 0x1000>;
cache-line-size = <32>; // 32 bytes
diff --git a/arch/powerpc/boot/dts/mpc8560ads.dts b/arch/powerpc/boot/dts/mpc8560ads.dts
index f0b1f98..5d9f3c4 100644
--- a/arch/powerpc/boot/dts/mpc8560ads.dts
+++ b/arch/powerpc/boot/dts/mpc8560ads.dts
@@ -64,7 +64,7 @@
interrupts = <18 2>;
};
- l2-cache-controller at 20000 {
+ L2: l2-cache-controller at 20000 {
compatible = "fsl,8540-l2-cache-controller";
reg = <0x20000 0x1000>;
cache-line-size = <32>; // 32 bytes
diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts b/arch/powerpc/boot/dts/mpc8568mds.dts
index d9064ee..d7af8db 100644
--- a/arch/powerpc/boot/dts/mpc8568mds.dts
+++ b/arch/powerpc/boot/dts/mpc8568mds.dts
@@ -42,6 +42,7 @@
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
+ next-level-cache = <&L2>;
};
};
@@ -70,7 +71,7 @@
interrupts = <18 2>;
};
- l2-cache-controller at 20000 {
+ L2: l2-cache-controller at 20000 {
compatible = "fsl,8568-l2-cache-controller";
reg = <0x20000 0x1000>;
cache-line-size = <32>; // 32 bytes
diff --git a/arch/powerpc/boot/dts/mpc8572ds.dts b/arch/powerpc/boot/dts/mpc8572ds.dts
index 3ca8cae..a444e6a 100644
--- a/arch/powerpc/boot/dts/mpc8572ds.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds.dts
@@ -42,6 +42,7 @@
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
+ next-level-cache = <&L2>;
};
PowerPC,8572 at 1 {
@@ -54,6 +55,7 @@
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
+ next-level-cache = <&L2>;
};
};
@@ -84,7 +86,7 @@
interrupts = <18 2>;
};
- l2-cache-controller at 20000 {
+ L2: l2-cache-controller at 20000 {
compatible = "fsl,mpc8572-l2-cache-controller";
reg = <0x20000 0x1000>;
cache-line-size = <32>; // 32 bytes
diff --git a/arch/powerpc/boot/dts/sbc8548.dts b/arch/powerpc/boot/dts/sbc8548.dts
index ce496fb..d252e38 100644
--- a/arch/powerpc/boot/dts/sbc8548.dts
+++ b/arch/powerpc/boot/dts/sbc8548.dts
@@ -44,6 +44,7 @@
timebase-frequency = <0>; // From uboot
bus-frequency = <0>;
clock-frequency = <0>;
+ next-level-cache = <&L2>;
};
};
@@ -161,7 +162,7 @@
interrupts = <0x12 0x2>;
};
- l2-cache-controller at 20000 {
+ L2: l2-cache-controller at 20000 {
compatible = "fsl,8548-l2-cache-controller";
reg = <0x20000 0x1000>;
cache-line-size = <0x20>; // 32 bytes
diff --git a/arch/powerpc/boot/dts/sbc8560.dts b/arch/powerpc/boot/dts/sbc8560.dts
index 2663501..e556c5a 100644
--- a/arch/powerpc/boot/dts/sbc8560.dts
+++ b/arch/powerpc/boot/dts/sbc8560.dts
@@ -43,6 +43,7 @@
timebase-frequency = <0>; // From uboot
bus-frequency = <0>;
clock-frequency = <0>;
+ next-level-cache = <&L2>;
};
};
@@ -66,7 +67,7 @@
interrupts = <0x12 0x2>;
};
- l2-cache-controller at 20000 {
+ L2: l2-cache-controller at 20000 {
compatible = "fsl,8560-l2-cache-controller";
reg = <0x20000 0x1000>;
cache-line-size = <0x20>; // 32 bytes
diff --git a/arch/powerpc/boot/dts/stx_gp3_8560.dts b/arch/powerpc/boot/dts/stx_gp3_8560.dts
index 096277b..1e61283 100644
--- a/arch/powerpc/boot/dts/stx_gp3_8560.dts
+++ b/arch/powerpc/boot/dts/stx_gp3_8560.dts
@@ -38,6 +38,7 @@
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
+ next-level-cache = <&L2>;
};
};
@@ -62,7 +63,7 @@
interrupts = <18 2>;
};
- l2-cache-controller at 20000 {
+ L2: l2-cache-controller at 20000 {
compatible = "fsl,8540-l2-cache-controller";
reg = <0x20000 0x1000>;
cache-line-size = <32>;
diff --git a/arch/powerpc/boot/dts/tqm8540.dts b/arch/powerpc/boot/dts/tqm8540.dts
index 8ee4664..7b653a5 100644
--- a/arch/powerpc/boot/dts/tqm8540.dts
+++ b/arch/powerpc/boot/dts/tqm8540.dts
@@ -40,6 +40,7 @@
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
+ next-level-cache = <&L2>;
};
};
@@ -64,7 +65,7 @@
interrupts = <18 2>;
};
- l2-cache-controller at 20000 {
+ L2: l2-cache-controller at 20000 {
compatible = "fsl,8540-l2-cache-controller";
reg = <0x20000 0x1000>;
cache-line-size = <32>;
diff --git a/arch/powerpc/boot/dts/tqm8541.dts b/arch/powerpc/boot/dts/tqm8541.dts
index cadbebf..8fe73ef 100644
--- a/arch/powerpc/boot/dts/tqm8541.dts
+++ b/arch/powerpc/boot/dts/tqm8541.dts
@@ -39,6 +39,7 @@
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
+ next-level-cache = <&L2>;
};
};
@@ -63,7 +64,7 @@
interrupts = <18 2>;
};
- l2-cache-controller at 20000 {
+ L2: l2-cache-controller at 20000 {
compatible = "fsl,8540-l2-cache-controller";
reg = <0x20000 0x1000>;
cache-line-size = <32>;
diff --git a/arch/powerpc/boot/dts/tqm8555.dts b/arch/powerpc/boot/dts/tqm8555.dts
index 9d6dc04..0a53bb9 100644
--- a/arch/powerpc/boot/dts/tqm8555.dts
+++ b/arch/powerpc/boot/dts/tqm8555.dts
@@ -39,6 +39,7 @@
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
+ next-level-cache = <&L2>;
};
};
@@ -63,7 +64,7 @@
interrupts = <18 2>;
};
- l2-cache-controller at 20000 {
+ L2: l2-cache-controller at 20000 {
compatible = "fsl,8540-l2-cache-controller";
reg = <0x20000 0x1000>;
cache-line-size = <32>;
diff --git a/arch/powerpc/boot/dts/tqm8560.dts b/arch/powerpc/boot/dts/tqm8560.dts
index 358cbd7..a4ee596 100644
--- a/arch/powerpc/boot/dts/tqm8560.dts
+++ b/arch/powerpc/boot/dts/tqm8560.dts
@@ -40,6 +40,7 @@
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
+ next-level-cache = <&L2>;
};
};
@@ -64,7 +65,7 @@
interrupts = <18 2>;
};
- l2-cache-controller at 20000 {
+ L2: l2-cache-controller at 20000 {
compatible = "fsl,8540-l2-cache-controller";
reg = <0x20000 0x1000>;
cache-line-size = <32>;
--
1.5.4.5
More information about the Linuxppc-dev
mailing list