MMIO and gcc re-ordering issue
cfriesen at nortel.com
Wed May 28 07:23:51 EST 2008
Roland Dreier wrote:
> Writes are posted yes, but not reordered arbitrarily. If I have code like:
> writel(val1, reg1);
> writel(val2, reg2);
> then I have a reasonable expectation that if two CPUs run this at the
> same time, their writes to reg1/reg2 won't be interleaved with each
> other (because the whole section is inside a spinlock). And Altix
> violates that expectation.
Does that necessarily follow?
If you've got a large system with multiple pci bridges, could you end up
with posted writes coming from different cpus taking a different amount
of time to propagate to a device and thus colliding?
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