MMIO and gcc re-ordering issue
rdreier at cisco.com
Wed May 28 04:07:05 EST 2008
> Um, OK, you've said write twice now ... I was assuming you meant read.
> Even on an x86, writes are posted, so there's no way a spin lock could
> serialise a write without an intervening read to flush the posting
> (that's why only reads have a relaxed version on altix). Or is there
> something else I'm missing?
Writes are posted yes, but not reordered arbitrarily. If I have code like:
then I have a reasonable expectation that if two CPUs run this at the
same time, their writes to reg1/reg2 won't be interleaved with each
other (because the whole section is inside a spinlock). And Altix
violates that expectation.
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