[PATCH 2/4] [POWERPC] Xilinx: Virtex: Enable dcr for MMIO andNATIVE

Stephen Neuendorffer stephen.neuendorffer at xilinx.com
Wed May 7 03:33:43 EST 2008


Yes, but this is a symptom of a separate problem, which is that it is
sometimes valuable to generate an optimized kernel configuration for a
particular FPGA system.  First order, I'm more concerned about getting a
kernel which is generic and can work with (more or less) any device
tree.

Steve

> -----Original Message-----
> From: Benjamin Herrenschmidt [mailto:benh at kernel.crashing.org]
> Sent: Monday, May 05, 2008 5:12 PM
> To: Stephen Neuendorffer
> Cc: jwboyer at linux.vnet.ibm.com; grant.likely at secretlab.ca;
linuxppc-dev at ozlabs.org
> Subject: Re: [PATCH 2/4] [POWERPC] Xilinx: Virtex: Enable dcr for MMIO
andNATIVE
> 
> 
> On Mon, 2008-05-05 at 10:56 -0700, Stephen Neuendorffer wrote:
> > FPGA designs may have need of both MMIO-based and NATIVE-based dcr
> > interfaces.
> 
> You say _may_ ... wouldn't it be better if it was thus left to a given
> virtex based platform to enable DCR_MMIO if it uses it and leave only
> NATIVE by default ?
> 
> > Signed-off-by: Stephen Neuendorffer
<stephen.neuendorffer at xilinx.com>
> > ---
> >  arch/powerpc/platforms/40x/Kconfig |    2 ++
> >  1 files changed, 2 insertions(+), 0 deletions(-)
> >
> > diff --git a/arch/powerpc/platforms/40x/Kconfig
b/arch/powerpc/platforms/40x/Kconfig
> > index a9260e2..b8e06df 100644
> > --- a/arch/powerpc/platforms/40x/Kconfig
> > +++ b/arch/powerpc/platforms/40x/Kconfig
> > @@ -123,6 +123,8 @@ config 405GPR
> >
> >  config XILINX_VIRTEX
> >  	bool
> > +	select PPC_DCR_MMIO
> > +	select PPC_DCR_NATIVE
> >
> >  config XILINX_VIRTEX_II_PRO
> >  	bool
> 





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